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Searched refs:CVI_RTC_REG_BASE (Results 1 – 1 of 1) sorted by relevance

/bsp/cvitek/drivers/
A Ddrv_por.c26 #define CVI_RTC_REG_BASE _cvi_rtc_reg_base macro
37 mmio_write_32(CVI_RTC_REG_BASE + RTC_APB_BUSY_SEL,0x1); in cvi_restart()
42 mmio_write_32(CVI_RTC_REG_BASE + RTC_EN_WARM_RST_REQ, 0x1); in cvi_restart()
44 while (mmio_read_32(CVI_RTC_REG_BASE + RTC_EN_WARM_RST_REQ) != 0x01); in cvi_restart()
46 while (mmio_read_32(CVI_RTC_REG_BASE + RSM_STATE) != ST_ON); in cvi_restart()

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