Home
last modified time | relevance | path

Searched refs:CYBSP_SWDCK_PORT (Results 1 – 20 of 20) sorted by relevance

/bsp/Infineon/libraries/templates/XMC7200D/libs/TARGET_APP_KIT_XMC72_EVK/config/GeneratedSource/
A Dcycfg_pins.c216 Cy_GPIO_Pin_Init(CYBSP_SWDCK_PORT, CYBSP_SWDCK_PIN, &CYBSP_SWDCK_config); in init_cycfg_pins()
A Dcycfg_pins.h214 #define CYBSP_SWDCK_PORT GPIO_PRT23 macro
/bsp/Infineon/xmc7200-kit_xmc7200_evk/libs/TARGET_APP_KIT_XMC72_EVK/config/GeneratedSource/
A Dcycfg_pins.c216 Cy_GPIO_Pin_Init(CYBSP_SWDCK_PORT, CYBSP_SWDCK_PIN, &CYBSP_SWDCK_config); in init_cycfg_pins()
A Dcycfg_pins.h214 #define CYBSP_SWDCK_PORT GPIO_PRT23 macro
/bsp/Infineon/xmc7100d-f144k4160aa/libs/TARGET_APP_KIT_XMC71_EVK_LITE_V2/config/GeneratedSource/
A Dcycfg_pins.c235 Cy_GPIO_Pin_Init(CYBSP_SWDCK_PORT, CYBSP_SWDCK_PIN, &CYBSP_SWDCK_config); in init_cycfg_pins()
A Dcycfg_pins.h214 #define CYBSP_SWDCK_PORT GPIO_PRT23 macro
/bsp/Infineon/psoc6-cy8ckit-062-WIFI-BT/libs/TARGET_CY8CKIT-062-WIFI-BT/config/GeneratedSource/
A Dcycfg_pins.h234 #define CYBSP_SWDCK_PORT GPIO_PRT6 macro
235 #define CYBSP_J2_18_PORT CYBSP_SWDCK_PORT
A Dcycfg_pins.c421 Cy_GPIO_Pin_Init(CYBSP_SWDCK_PORT, CYBSP_SWDCK_PIN, &CYBSP_SWDCK_config); in init_cycfg_pins()
/bsp/Infineon/psoc6-evaluationkit-062S2/libs/TARGET_RTT-062S2/config/GeneratedSource/
A Dcycfg_pins.c300 Cy_GPIO_Pin_Init(CYBSP_SWDCK_PORT, CYBSP_SWDCK_PIN, &CYBSP_SWDCK_config); in init_cycfg_pins()
A Dcycfg_pins.h104 #define CYBSP_SWDCK_PORT GPIO_PRT6 macro
/bsp/Infineon/psoc6-cy8ckit-062s4/libs/TARGET_CY8CKIT-062S4/config/GeneratedSource/
A Dcycfg_pins.c324 Cy_GPIO_Pin_Init(CYBSP_SWDCK_PORT, CYBSP_SWDCK_PIN, &CYBSP_SWDCK_config); in init_cycfg_pins()
A Dcycfg_pins.h160 #define CYBSP_SWDCK_PORT GPIO_PRT6 macro
/bsp/Infineon/psoc6-cy8cproto-062S3-4343W/libs/TARGET_CY8CPROTO-062S3-4343W/config/GeneratedSource/
A Dcycfg_pins.c324 Cy_GPIO_Pin_Init(CYBSP_SWDCK_PORT, CYBSP_SWDCK_PIN, &CYBSP_SWDCK_config); in init_cycfg_pins()
A Dcycfg_pins.h130 #define CYBSP_SWDCK_PORT GPIO_PRT6 macro
/bsp/Infineon/psoc6-cy8ckit-062S2-43012/libs/TARGET_CY8CKIT-062S2-43012/config/GeneratedSource/
A Dcycfg_pins.c421 Cy_GPIO_Pin_Init(CYBSP_SWDCK_PORT, CYBSP_SWDCK_PIN, &CYBSP_SWDCK_config); in init_cycfg_pins()
A Dcycfg_pins.h252 #define CYBSP_SWDCK_PORT GPIO_PRT6 macro
/bsp/Infineon/libraries/templates/PSOC62/libs/TARGET_CY8CKIT-062S2-43012/config/GeneratedSource/
A Dcycfg_pins.c421 Cy_GPIO_Pin_Init(CYBSP_SWDCK_PORT, CYBSP_SWDCK_PIN, &CYBSP_SWDCK_config); in init_cycfg_pins()
A Dcycfg_pins.h252 #define CYBSP_SWDCK_PORT GPIO_PRT6 macro
/bsp/Infineon/psoc6-cy8ckit-062-BLE/libs/TARGET_CY8CKIT-062-BLE/config/GeneratedSource/
A Dcycfg_pins.c421 Cy_GPIO_Pin_Init(CYBSP_SWDCK_PORT, CYBSP_SWDCK_PIN, &CYBSP_SWDCK_config); in init_cycfg_pins()
A Dcycfg_pins.h218 #define CYBSP_SWDCK_PORT GPIO_PRT6 macro

Completed in 36 milliseconds