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Searched refs:Channel (Results 1 – 25 of 327) sorted by relevance

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/bsp/Vango/v85xxp/Libraries/VangoV85xxP_standard_peripheral/Source/
A Dlib_pwm.c79 OCInitType->Channel = PWM_CHANNEL_0; in PWM_OCStructInit()
243 tmp = PWMx->CCTL[Channel]; in PWM_ChannelINTConfig()
249 PWMx->CCTL[Channel] = tmp; in PWM_ChannelINTConfig()
302 tmp = PWMx->CCTL[Channel]; in PWM_ClearChannelINTStatus()
305 PWMx->CCTL[Channel] = tmp; in PWM_ClearChannelINTStatus()
337 PWMx->CCR[Channel] = Period; in PWM_CCRConfig()
409 tmp = PWMx->CCTL[Channel]; in PWM_OutputCmd()
419 PWMx->CCTL[Channel] = tmp; in PWM_OutputCmd()
443 tmp = PWMx->CCTL[Channel]; in PWM_SetOutLevel()
446 PWMx->CCTL[Channel] = tmp; in PWM_SetOutLevel()
[all …]
A Dlib_dma.c27 void DMA_DeInit(uint32_t Channel) in DMA_DeInit() argument
35 addr = &DMA->C0CTL + Channel*4; in DMA_DeInit()
39 DMA->IE &= ~((1<<(Channel))\ in DMA_DeInit()
40 |(1<<(Channel+4))\ in DMA_DeInit()
41 |(1<<(Channel+8))); in DMA_DeInit()
44 DMA->STS = (1<<(Channel+4))\ in DMA_DeInit()
45 |(1<<(Channel+8))\ in DMA_DeInit()
46 |(1<<(Channel+12)); in DMA_DeInit()
49 addr = &DMA->C0CTL + Channel*4; in DMA_DeInit()
53 addr = &DMA->C0SRC + Channel*4; in DMA_DeInit()
[all …]
/bsp/acm32/acm32f4xx-nucleo/libraries/HAL_Driver/Src/
A DHAL_DAC.c185 if (Channel == DAC_CHANNEL_1) in HAL_DAC_ConfigChannel()
282 if (Channel == DAC_CHANNEL_1) in HAL_DAC_Start()
326 if (Channel == DAC_CHANNEL_1) in HAL_DAC_Stop()
361 if (Channel == DAC_CHANNEL_1) in HAL_DAC_Start_DMA()
386 else if(Channel == DAC_CHANNEL_2) in HAL_DAC_Start_DMA()
459 if(Channel == DAC_CHANNEL_1) in HAL_DAC_Stop_DMA()
509 if (Channel == DAC_CHANNEL_1) in HAL_DAC_SetValue()
585 if(Channel == DAC_CHANNEL_1) in HAL_DAC_GetValue()
724 if (Channel == DAC_CHANNEL_1) in HAL_DACEx_SelfCalibrate()
747 …status=(hdac->Instance->SR & (DAC_SR_CAL_FLAG1 << (Channel & 0x10UL)))>>(DAC_SR_CAL_FLAG1_Pos +Cha… in HAL_DACEx_SelfCalibrate()
[all …]
A DHAL_TIMER.c297 switch(Channel) in HAL_TIMER_Output_Config()
528 switch(Channel) in HAL_TIMER_Capture_Config()
806 switch(Channel) in HAL_TIM_PWM_Output_Start()
869 switch(Channel) in HAL_TIM_PWM_Output_Stop()
922 switch(Channel) in HAL_TIMER_OC_Start()
986 switch(Channel) in HAL_TIMER_OCxN_Start()
1047 switch(Channel) in HAL_TIMER_OC_Stop()
1100 switch(Channel) in HAL_TIM_Capture_Start()
1147 switch(Channel) in HAL_TIM_Capture_Stop()
1210 switch (Channel) in HAL_TIMER_ReadCapturedValue()
[all …]
/bsp/Vango/v85xx/Libraries/VangoV85xx_standard_peripheral/Source/
A Dlib_dma.c27 void DMA_DeInit(uint32_t Channel) in DMA_DeInit() argument
35 addr = &DMA->C0CTL + Channel*4; in DMA_DeInit()
39 DMA->IE &= ~((1<<(Channel))\ in DMA_DeInit()
40 |(1<<(Channel+4))\ in DMA_DeInit()
41 |(1<<(Channel+8))); in DMA_DeInit()
44 DMA->STS = (1<<(Channel+4))\ in DMA_DeInit()
45 |(1<<(Channel+8))\ in DMA_DeInit()
46 |(1<<(Channel+12)); in DMA_DeInit()
49 addr = &DMA->C0CTL + Channel*4; in DMA_DeInit()
53 addr = &DMA->C0SRC + Channel*4; in DMA_DeInit()
[all …]
A Dlib_pwm.c253 assert_parameters(IS_PWM_CHANNEL(Channel)); in PWM_ChannelINTConfig()
256 addr = &PWMx->CCTL0 + Channel; in PWM_ChannelINTConfig()
282 assert_parameters(IS_PWM_CHANNEL(Channel)); in PWM_GetChannelINTStatus()
284 addr = &PWMx->CCTL0 + Channel; in PWM_GetChannelINTStatus()
312 assert_parameters(IS_PWM_CHANNEL(Channel)); in PWM_ClearChannelINTStatus()
314 addr = &PWMx->CCTL0 + Channel; in PWM_ClearChannelINTStatus()
351 assert_parameters(IS_PWM_CHANNEL(Channel)); in PWM_CCRConfig()
353 addr = &PWMx->CCR0 + Channel; in PWM_CCRConfig()
424 assert_parameters(IS_PWM_CHANNEL(Channel)); in PWM_OutputCmd()
427 addr = &PWMx->CCTL0 + Channel; in PWM_OutputCmd()
[all …]
/bsp/tae32f5300/Libraries/TAE32F53xx_StdPeriph_Driver/src/
A Dtae32f53xx_ll_dac.c182 uint8_t chnnum = POSITION_VAL(Channel); in LL_DAC_ChannelConfig()
186 assert_param(IS_DAC_CHANNEL(Channel)); in LL_DAC_ChannelConfig()
216 uint8_t chnnum = POSITION_VAL(Channel); in LL_DAC_SawtoothWaveGenerate()
220 assert_param(IS_DAC_CHANNEL(Channel)); in LL_DAC_SawtoothWaveGenerate()
262 uint8_t chnnum = POSITION_VAL(Channel); in LL_DAC_TriangleWaveGenerate()
266 assert_param(IS_DAC_CHANNEL(Channel)); in LL_DAC_TriangleWaveGenerate()
326 uint8_t chnnum = POSITION_VAL(Channel); in LL_DAC_Start()
330 assert_param(IS_DAC_CHANNEL(Channel)); in LL_DAC_Start()
358 assert_param(IS_DAC_CHANNEL(Channel)); in LL_DAC_Stop()
389 assert_param(IS_DAC_CHANNEL(Channel)); in LL_DAC_SetValue()
[all …]
A Dtae32f53xx_ll_cmp.c174 uint8_t chnnum = POSITION_VAL(Channel); in LL_CMP_ChannelConfig()
178 assert_param(IS_CMP_CHANNEL(Channel)); in LL_CMP_ChannelConfig()
183 assert_param(IS_CMP_BLANKING_SOURCE(Channel, sConfig->BlankingSource)); in LL_CMP_ChannelConfig()
245 LL_StatusETypeDef LL_CMP_Start(CMP_TypeDef *Instance, uint32_t Channel) in LL_CMP_Start() argument
248 uint8_t chnnum = POSITION_VAL(Channel); in LL_CMP_Start()
252 assert_param(IS_CMP_CHANNEL(Channel)); in LL_CMP_Start()
273 LL_StatusETypeDef LL_CMP_Stop(CMP_TypeDef *Instance, uint32_t Channel) in LL_CMP_Stop() argument
276 uint8_t chnnum = POSITION_VAL(Channel); in LL_CMP_Stop()
280 assert_param(IS_CMP_CHANNEL(Channel)); in LL_CMP_Stop()
351 LL_UNUSED(Channel); in LL_CMP_FailingEdgeTrigCallback()
[all …]
A Dtae32f53xx_ll_adc.c538 ADC_REG_InitStruct->Channel in LL_ADC_REG_Init()
580 if (ADC_REG_InitStruct->Channel > 7) { in LL_ADC_REG_Init()
821 (AnalogWDGConfig->Channel) in LL_ADC_AnalogWDGConfig()
1255 if ((__LL_ADC_GET_IT_DONE(Instance, Channel)) && (__LL_ADC_GET_FLAG_DONE(Instance, Channel))) { in LL_ADC_SAMP_IRQHandler()
1256 __LL_ADC_CLEAR_FLAG_DONE(Instance, Channel); in LL_ADC_SAMP_IRQHandler()
1259 LL_ADC_SampCallback(Instance, Channel); in LL_ADC_SAMP_IRQHandler()
1271 if ((__LL_ADC_GET_IT_HALF(Instance, Channel)) && (__LL_ADC_GET_FLAG_HALF(Instance, Channel))) { in LL_ADC_HALF_IRQHandler()
1272 __LL_ADC_CLEAR_FLAG_HALF(Instance, Channel); in LL_ADC_HALF_IRQHandler()
1275 LL_ADC_HalfCallback(Instance, Channel); in LL_ADC_HALF_IRQHandler()
1287 if ((__LL_ADC_GET_IT_FULL(Instance, Channel)) && (__LL_ADC_GET_FLAG_FULL(Instance, Channel))) { in LL_ADC_FULL_IRQHandler()
[all …]
/bsp/stm32/libraries/STM32L1xx_HAL/STM32L1xx_HAL_Driver/Inc/
A Dstm32l1xx_ll_dma.h491 __STATIC_INLINE void LL_DMA_EnableChannel(DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_EnableChannel() argument
510 __STATIC_INLINE void LL_DMA_DisableChannel(DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_DisableChannel() argument
661 __STATIC_INLINE uint32_t LL_DMA_GetMode(DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_GetMode() argument
798 __STATIC_INLINE uint32_t LL_DMA_GetPeriphSize(DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_GetPeriphSize() argument
1799 __STATIC_INLINE void LL_DMA_EnableIT_TC(DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_EnableIT_TC() argument
1818 __STATIC_INLINE void LL_DMA_EnableIT_HT(DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_EnableIT_HT() argument
1837 __STATIC_INLINE void LL_DMA_EnableIT_TE(DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_EnableIT_TE() argument
1856 __STATIC_INLINE void LL_DMA_DisableIT_TC(DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_DisableIT_TC() argument
1875 __STATIC_INLINE void LL_DMA_DisableIT_HT(DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_DisableIT_HT() argument
1894 __STATIC_INLINE void LL_DMA_DisableIT_TE(DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_DisableIT_TE() argument
[all …]
/bsp/Infineon/psoc6-cy8ckit-062s4/libs/TARGET_CY8CKIT-062S4/COMPONENT_CM4/TOOLCHAIN_ARM/
A Dstartup_psoc6_04_cm4.s111 DCD cpuss_interrupts_dmac_0_IRQHandler ; CPUSS DMAC, Channel #0
112 DCD cpuss_interrupts_dmac_1_IRQHandler ; CPUSS DMAC, Channel #1
115 DCD cpuss_interrupts_dw0_0_IRQHandler ; CPUSS DataWire #0, Channel #0
116 DCD cpuss_interrupts_dw0_1_IRQHandler ; CPUSS DataWire #0, Channel #1
117 DCD cpuss_interrupts_dw0_2_IRQHandler ; CPUSS DataWire #0, Channel #2
118 DCD cpuss_interrupts_dw0_3_IRQHandler ; CPUSS DataWire #0, Channel #3
119 DCD cpuss_interrupts_dw0_4_IRQHandler ; CPUSS DataWire #0, Channel #4
120 DCD cpuss_interrupts_dw0_5_IRQHandler ; CPUSS DataWire #0, Channel #5
121 DCD cpuss_interrupts_dw0_6_IRQHandler ; CPUSS DataWire #0, Channel #6
122 DCD cpuss_interrupts_dw0_7_IRQHandler ; CPUSS DataWire #0, Channel #7
[all …]
/bsp/Infineon/psoc6-cy8cproto-062S3-4343W/libs/TARGET_CY8CPROTO-062S3-4343W/COMPONENT_CM4/TOOLCHAIN_ARM/
A Dstartup_psoc6_03_cm4.s111 DCD cpuss_interrupts_dmac_0_IRQHandler ; CPUSS DMAC, Channel #0
112 DCD cpuss_interrupts_dmac_1_IRQHandler ; CPUSS DMAC, Channel #1
115 DCD cpuss_interrupts_dw0_0_IRQHandler ; CPUSS DataWire #0, Channel #0
116 DCD cpuss_interrupts_dw0_1_IRQHandler ; CPUSS DataWire #0, Channel #1
117 DCD cpuss_interrupts_dw0_2_IRQHandler ; CPUSS DataWire #0, Channel #2
118 DCD cpuss_interrupts_dw0_3_IRQHandler ; CPUSS DataWire #0, Channel #3
119 DCD cpuss_interrupts_dw0_4_IRQHandler ; CPUSS DataWire #0, Channel #4
120 DCD cpuss_interrupts_dw0_5_IRQHandler ; CPUSS DataWire #0, Channel #5
121 DCD cpuss_interrupts_dw0_6_IRQHandler ; CPUSS DataWire #0, Channel #6
122 DCD cpuss_interrupts_dw0_7_IRQHandler ; CPUSS DataWire #0, Channel #7
[all …]
/bsp/stm32/libraries/STM32L1xx_HAL/STM32L1xx_HAL_Driver/Src/
A Dstm32l1xx_ll_dma.c151 uint32_t LL_DMA_DeInit(DMA_TypeDef *DMAx, uint32_t Channel) in LL_DMA_DeInit() argument
157 assert_param(IS_LL_DMA_ALL_CHANNEL_INSTANCE(DMAx, Channel) || (Channel == LL_DMA_CHANNEL_ALL)); in LL_DMA_DeInit()
159 if (Channel == LL_DMA_CHANNEL_ALL) in LL_DMA_DeInit()
204 if (Channel == LL_DMA_CHANNEL_1) in LL_DMA_DeInit()
209 else if (Channel == LL_DMA_CHANNEL_2) in LL_DMA_DeInit()
214 else if (Channel == LL_DMA_CHANNEL_3) in LL_DMA_DeInit()
219 else if (Channel == LL_DMA_CHANNEL_4) in LL_DMA_DeInit()
224 else if (Channel == LL_DMA_CHANNEL_5) in LL_DMA_DeInit()
230 else if (Channel == LL_DMA_CHANNEL_6) in LL_DMA_DeInit()
235 else if (Channel == LL_DMA_CHANNEL_7) in LL_DMA_DeInit()
[all …]
A Dstm32l1xx_hal_dac.c449 assert_param(IS_DAC_CHANNEL(Channel)); in HAL_DAC_Start()
458 __HAL_DAC_ENABLE(hdac, Channel); in HAL_DAC_Start()
460 if (Channel == DAC_CHANNEL_1) in HAL_DAC_Start()
507 __HAL_DAC_DISABLE(hdac, Channel); in HAL_DAC_Stop()
549 if (Channel == DAC_CHANNEL_1) in HAL_DAC_Start_DMA()
619 if (Channel == DAC_CHANNEL_1) in HAL_DAC_Start_DMA()
644 __HAL_DAC_ENABLE(hdac, Channel); in HAL_DAC_Start_DMA()
674 __HAL_DAC_DISABLE(hdac, Channel); in HAL_DAC_Stop_DMA()
679 if (Channel == DAC_CHANNEL_1) in HAL_DAC_Stop_DMA()
796 if (Channel == DAC_CHANNEL_1) in HAL_DAC_SetValue()
[all …]
A Dstm32l1xx_hal_tim.c879 switch (Channel) in HAL_TIM_OC_Start_IT()
950 switch (Channel) in HAL_TIM_OC_Stop_IT()
1038 switch (Channel) in HAL_TIM_OC_Start_DMA()
1167 switch (Channel) in HAL_TIM_OC_Stop_DMA()
1481 switch (Channel) in HAL_TIM_PWM_Start_IT()
1552 switch (Channel) in HAL_TIM_PWM_Stop_IT()
1640 switch (Channel) in HAL_TIM_PWM_Start_DMA()
1768 switch (Channel) in HAL_TIM_PWM_Stop_DMA()
3118 if ((Channel == TIM_CHANNEL_1) || (Channel == TIM_CHANNEL_2)) in HAL_TIM_Encoder_Stop()
3267 if ((Channel == TIM_CHANNEL_1) || (Channel == TIM_CHANNEL_2)) in HAL_TIM_Encoder_Stop_IT()
[all …]
/bsp/Infineon/psoc6-cy8ckit-062S2-43012/libs/TARGET_CY8CKIT-062S2-43012/COMPONENT_CM4/TOOLCHAIN_ARM/
A Dstartup_psoc6_02_cm4.s111 DCD cpuss_interrupts_dmac_0_IRQHandler ; CPUSS DMAC, Channel #0
112 DCD cpuss_interrupts_dmac_1_IRQHandler ; CPUSS DMAC, Channel #1
113 DCD cpuss_interrupts_dmac_2_IRQHandler ; CPUSS DMAC, Channel #2
114 DCD cpuss_interrupts_dmac_3_IRQHandler ; CPUSS DMAC, Channel #3
115 DCD cpuss_interrupts_dw0_0_IRQHandler ; CPUSS DataWire #0, Channel #0
116 DCD cpuss_interrupts_dw0_1_IRQHandler ; CPUSS DataWire #0, Channel #1
117 DCD cpuss_interrupts_dw0_2_IRQHandler ; CPUSS DataWire #0, Channel #2
118 DCD cpuss_interrupts_dw0_3_IRQHandler ; CPUSS DataWire #0, Channel #3
119 DCD cpuss_interrupts_dw0_4_IRQHandler ; CPUSS DataWire #0, Channel #4
120 DCD cpuss_interrupts_dw0_5_IRQHandler ; CPUSS DataWire #0, Channel #5
[all …]
/bsp/Infineon/psoc6-evaluationkit-062S2/libs/TARGET_RTT-062S2/COMPONENT_CM4/TOOLCHAIN_ARM/
A Dstartup_psoc6_02_cm4.s111 DCD cpuss_interrupts_dmac_0_IRQHandler ; CPUSS DMAC, Channel #0
112 DCD cpuss_interrupts_dmac_1_IRQHandler ; CPUSS DMAC, Channel #1
113 DCD cpuss_interrupts_dmac_2_IRQHandler ; CPUSS DMAC, Channel #2
114 DCD cpuss_interrupts_dmac_3_IRQHandler ; CPUSS DMAC, Channel #3
115 DCD cpuss_interrupts_dw0_0_IRQHandler ; CPUSS DataWire #0, Channel #0
116 DCD cpuss_interrupts_dw0_1_IRQHandler ; CPUSS DataWire #0, Channel #1
117 DCD cpuss_interrupts_dw0_2_IRQHandler ; CPUSS DataWire #0, Channel #2
118 DCD cpuss_interrupts_dw0_3_IRQHandler ; CPUSS DataWire #0, Channel #3
119 DCD cpuss_interrupts_dw0_4_IRQHandler ; CPUSS DataWire #0, Channel #4
120 DCD cpuss_interrupts_dw0_5_IRQHandler ; CPUSS DataWire #0, Channel #5
[all …]
/bsp/Infineon/libraries/templates/PSOC62/libs/TARGET_CY8CKIT-062S2-43012/COMPONENT_CM4/TOOLCHAIN_ARM/
A Dstartup_psoc6_02_cm4.s111 DCD cpuss_interrupts_dmac_0_IRQHandler ; CPUSS DMAC, Channel #0
112 DCD cpuss_interrupts_dmac_1_IRQHandler ; CPUSS DMAC, Channel #1
113 DCD cpuss_interrupts_dmac_2_IRQHandler ; CPUSS DMAC, Channel #2
114 DCD cpuss_interrupts_dmac_3_IRQHandler ; CPUSS DMAC, Channel #3
115 DCD cpuss_interrupts_dw0_0_IRQHandler ; CPUSS DataWire #0, Channel #0
116 DCD cpuss_interrupts_dw0_1_IRQHandler ; CPUSS DataWire #0, Channel #1
117 DCD cpuss_interrupts_dw0_2_IRQHandler ; CPUSS DataWire #0, Channel #2
118 DCD cpuss_interrupts_dw0_3_IRQHandler ; CPUSS DataWire #0, Channel #3
119 DCD cpuss_interrupts_dw0_4_IRQHandler ; CPUSS DataWire #0, Channel #4
120 DCD cpuss_interrupts_dw0_5_IRQHandler ; CPUSS DataWire #0, Channel #5
[all …]
/bsp/ht32/libraries/HT32_STD_5xxxx_FWLib/library/HT32F5xxxx_Driver/src/
A Dht32f5xxxx_tm.c242 if ((OutInit->Channel > TM_CH_3) && (OutInit->Channel <= TM_CH_7) ) in TM_OutputInit()
255 if ((OutInit->Channel > TM_CH_3) && (OutInit->Channel <= TM_CH_7) ) in TM_OutputInit()
457 OutInit->Channel = TM_CH_0; in TM_OutputStructInit()
479 CapInit->Channel = TM_CH_0; in TM_CaptureStructInit()
890 if ((Channel > TM_CH_3) && (Channel <= TM_CH_7)) in TM_CHCCRPreloadConfig()
892 u8 bOffset = Channel - 4; in TM_CHCCRPreloadConfig()
996 if ((Channel > TM_CH_3) && (Channel <= TM_CH_7) ) in TM_ImmActiveConfig()
998 u8 bOffset = Channel - 4; in TM_ImmActiveConfig()
1081 if ((Channel > TM_CH_3) && (Channel <= TM_CH_7) ) in TM_OutputModeConfig()
1083 u8 bOffset = Channel - 4; in TM_OutputModeConfig()
[all …]
/bsp/acm32/acm32f0x0-nucleo/libraries/HAL_Driver/Src/
A DHAL_TIMER.c264 switch(Channel) in HAL_TIMER_Output_Config()
495 switch(Channel) in HAL_TIMER_Capture_Config()
773 switch(Channel) in HAL_TIM_PWM_Output_Start()
836 switch(Channel) in HAL_TIM_PWM_Output_Stop()
889 switch(Channel) in HAL_TIMER_OC_Start()
953 switch(Channel) in HAL_TIMER_OCxN_Start()
1014 switch(Channel) in HAL_TIMER_OC_Stop()
1067 switch(Channel) in HAL_TIM_Capture_Start()
1114 switch(Channel) in HAL_TIM_Capture_Stop()
1177 switch (Channel) in HAL_TIMER_ReadCapturedValue()
[all …]
/bsp/Infineon/psoc6-cy8ckit-062s4/libs/TARGET_CY8CKIT-062S4/COMPONENT_CM4/TOOLCHAIN_IAR/
A Dstartup_psoc6_04_cm4.s136 DCD cpuss_interrupts_dmac_0_IRQHandler ; CPUSS DMAC, Channel #0
137 DCD cpuss_interrupts_dmac_1_IRQHandler ; CPUSS DMAC, Channel #1
140 DCD cpuss_interrupts_dw0_0_IRQHandler ; CPUSS DataWire #0, Channel #0
141 DCD cpuss_interrupts_dw0_1_IRQHandler ; CPUSS DataWire #0, Channel #1
142 DCD cpuss_interrupts_dw0_2_IRQHandler ; CPUSS DataWire #0, Channel #2
143 DCD cpuss_interrupts_dw0_3_IRQHandler ; CPUSS DataWire #0, Channel #3
144 DCD cpuss_interrupts_dw0_4_IRQHandler ; CPUSS DataWire #0, Channel #4
145 DCD cpuss_interrupts_dw0_5_IRQHandler ; CPUSS DataWire #0, Channel #5
146 DCD cpuss_interrupts_dw0_6_IRQHandler ; CPUSS DataWire #0, Channel #6
147 DCD cpuss_interrupts_dw0_7_IRQHandler ; CPUSS DataWire #0, Channel #7
[all …]
/bsp/Infineon/psoc6-cy8cproto-062S3-4343W/libs/TARGET_CY8CPROTO-062S3-4343W/COMPONENT_CM4/TOOLCHAIN_IAR/
A Dstartup_psoc6_03_cm4.s136 DCD cpuss_interrupts_dmac_0_IRQHandler ; CPUSS DMAC, Channel #0
137 DCD cpuss_interrupts_dmac_1_IRQHandler ; CPUSS DMAC, Channel #1
140 DCD cpuss_interrupts_dw0_0_IRQHandler ; CPUSS DataWire #0, Channel #0
141 DCD cpuss_interrupts_dw0_1_IRQHandler ; CPUSS DataWire #0, Channel #1
142 DCD cpuss_interrupts_dw0_2_IRQHandler ; CPUSS DataWire #0, Channel #2
143 DCD cpuss_interrupts_dw0_3_IRQHandler ; CPUSS DataWire #0, Channel #3
144 DCD cpuss_interrupts_dw0_4_IRQHandler ; CPUSS DataWire #0, Channel #4
145 DCD cpuss_interrupts_dw0_5_IRQHandler ; CPUSS DataWire #0, Channel #5
146 DCD cpuss_interrupts_dw0_6_IRQHandler ; CPUSS DataWire #0, Channel #6
147 DCD cpuss_interrupts_dw0_7_IRQHandler ; CPUSS DataWire #0, Channel #7
[all …]
/bsp/ht32/libraries/HT32_STD_1xxxx_FWLib/library/HT32F1xxxx_Driver/src/
A Dht32f1xxxx_tm.c196 u8 bChPos = OutInit->Channel << 1; in TM_OutputInit()
344 if (CapInit->Channel == TM_CH_0) in TM_PwmInputInit()
389 OutInit->Channel = TM_CH_0; in TM_OutputStructInit()
409 CapInit->Channel = TM_CH_0; in TM_CaptureStructInit()
790 Assert_Param(IS_TM_CH(Channel)); in TM_CHCCRPreloadConfig()
822 Assert_Param(IS_TM_CH(Channel)); in TM_ClearOREFConfig()
857 Assert_Param(IS_TM_CH(Channel)); in TM_ChPolarityConfig()
884 Assert_Param(IS_TM_CH(Channel)); in TM_ImmActiveConfig()
914 Assert_Param(IS_TM_CH(Channel)); in TM_ChannelConfig()
954 Assert_Param(IS_TM_CH(Channel)); in TM_OutputModeConfig()
[all …]
/bsp/microchip/samd51-adafruit-metro-m4/bsp/hri/
A Dhri_evsys_d51.h1427 tmp = ((Evsys *)hw)->Channel[submodule_index].CHANNEL.reg; in hri_evsys_get_CHANNEL_RUNSTDBY_bit()
1436 tmp = ((Evsys *)hw)->Channel[submodule_index].CHANNEL.reg; in hri_evsys_write_CHANNEL_RUNSTDBY_bit()
1439 ((Evsys *)hw)->Channel[submodule_index].CHANNEL.reg = tmp; in hri_evsys_write_CHANNEL_RUNSTDBY_bit()
1467 tmp = ((Evsys *)hw)->Channel[submodule_index].CHANNEL.reg; in hri_evsys_get_CHANNEL_ONDEMAND_bit()
1476 tmp = ((Evsys *)hw)->Channel[submodule_index].CHANNEL.reg; in hri_evsys_write_CHANNEL_ONDEMAND_bit()
1479 ((Evsys *)hw)->Channel[submodule_index].CHANNEL.reg = tmp; in hri_evsys_write_CHANNEL_ONDEMAND_bit()
1509 tmp = ((Evsys *)hw)->Channel[submodule_index].CHANNEL.reg; in hri_evsys_get_CHANNEL_EVGEN_bf()
1519 tmp = ((Evsys *)hw)->Channel[submodule_index].CHANNEL.reg; in hri_evsys_write_CHANNEL_EVGEN_bf()
1522 ((Evsys *)hw)->Channel[submodule_index].CHANNEL.reg = tmp; in hri_evsys_write_CHANNEL_EVGEN_bf()
1545 tmp = ((Evsys *)hw)->Channel[submodule_index].CHANNEL.reg; in hri_evsys_read_CHANNEL_EVGEN_bf()
[all …]
/bsp/microchip/samd51-seeed-wio-terminal/bsp/hri/
A Dhri_evsys_d51.h1427 tmp = ((Evsys *)hw)->Channel[submodule_index].CHANNEL.reg; in hri_evsys_get_CHANNEL_RUNSTDBY_bit()
1436 tmp = ((Evsys *)hw)->Channel[submodule_index].CHANNEL.reg; in hri_evsys_write_CHANNEL_RUNSTDBY_bit()
1439 ((Evsys *)hw)->Channel[submodule_index].CHANNEL.reg = tmp; in hri_evsys_write_CHANNEL_RUNSTDBY_bit()
1467 tmp = ((Evsys *)hw)->Channel[submodule_index].CHANNEL.reg; in hri_evsys_get_CHANNEL_ONDEMAND_bit()
1476 tmp = ((Evsys *)hw)->Channel[submodule_index].CHANNEL.reg; in hri_evsys_write_CHANNEL_ONDEMAND_bit()
1479 ((Evsys *)hw)->Channel[submodule_index].CHANNEL.reg = tmp; in hri_evsys_write_CHANNEL_ONDEMAND_bit()
1509 tmp = ((Evsys *)hw)->Channel[submodule_index].CHANNEL.reg; in hri_evsys_get_CHANNEL_EVGEN_bf()
1519 tmp = ((Evsys *)hw)->Channel[submodule_index].CHANNEL.reg; in hri_evsys_write_CHANNEL_EVGEN_bf()
1522 ((Evsys *)hw)->Channel[submodule_index].CHANNEL.reg = tmp; in hri_evsys_write_CHANNEL_EVGEN_bf()
1545 tmp = ((Evsys *)hw)->Channel[submodule_index].CHANNEL.reg; in hri_evsys_read_CHANNEL_EVGEN_bf()
[all …]

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