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Searched refs:DAR (Results 1 – 23 of 23) sorted by relevance

/bsp/essemi/es32vf2264/libraries/ALD/ES32VF2264/Source/
A Dald_dma.c82 WRITE_REG(DMA->CHANNEL[config->channel].DAR, (uint32_t)config->dst); in ald_dma_config_base()
229 WRITE_REG(DMA->CHANNEL[i].DAR, 0x0); in ald_dma_reset()
334 WRITE_REG(DMA->CHANNEL[channel].DAR, 0x0); in ald_dma_channel_config()
/bsp/ck802/libraries/common/dmac/
A Dck_dmac.h61 __IOM uint32_t DAR; /* offset: 0x04 (R/W) Channel Destination Address Register */ member
A Dck_dmac.c52 addr->DAR = dest ; in ck_dma_set_channel()
/bsp/essemi/es32vf2264/libraries/RV_CORE/Device/EastSoft/ES32VF2264/Include/ES32VF2264/
A Dreg_dma.h127 __IO uint32_t DAR; member
/bsp/airm2m/air105/libraries/HAL_Driver/Inc/
A Dair105_dma.h80 uint32_t DAR; member
/bsp/rockchip/common/rk_hal/lib/hal/src/
A Dhal_pl330.c198 DAR, enumerator
315 rd == SAR ? "SAR" : (rd == DAR ? "DAR" : "CCR"), imm); in PL330_Instr_DMAMOV()
870 off += PL330_Instr_DMAMOV(dryRun, &buf[off], DAR, x->dstAddr); in _Loop_Cyclic()
931 off += PL330_Instr_DMAMOV(dryRun, &buf[off], DAR, x->dstAddr); in _Setup_Xfer()
1418 val = READ_REG(reg->CHAN_CFG[pchan->chanId].DAR); in HAL_PL330_GetPosition()
A Dhal_dwdma.c70 READ_REG(dwc->creg->SAR), READ_REG(dwc->creg->DAR), in DWC_DumpRegs()
736 WRITE_REG(dwc->creg->DAR, config->dstAddr); in HAL_DWDMA_PrepDmaCyclic()
/bsp/ti/c28x/libraries/tms320f28379d/headers/include/
A DF2837xD_can.h60 bp_16 DAR:1; // 5 Disable Automatic Retransmission member
/bsp/tae32f5300/Libraries/TAE32F53xx_StdPeriph_Driver/inc/
A Dtae32f53xx_ll_dma.h256 #define __LL_DMA_DstAddr_Set(__DMA__, ch, addr) WRITE_REG((__DMA__)->CH[(ch)].DAR, addr)
/bsp/microchip/samd51-seeed-wio-terminal/bsp/samd51a/include/component/
A Dcan.h231 uint32_t DAR:1; /*!< bit: 6 Disable Automatic Retransmission */ member
/bsp/microchip/samd51-adafruit-metro-m4/bsp/samd51a/include/component/
A Dcan.h231 uint32_t DAR:1; /*!< bit: 6 Disable Automatic Retransmission */ member
/bsp/microchip/samc21/bsp/samc21/include/component/
A Dcan.h217 uint32_t DAR:1; /*!< bit: 6 Disable Automatic Retransmission */ member
/bsp/microchip/same54/bsp/include/component/
A Dcan.h217 uint32_t DAR:1; /*!< bit: 6 Disable Automatic Retransmission */ member
/bsp/microchip/same70/bsp/same70b/include/component/
A Dmcan.h894 …uint32_t DAR:1; /**< bit: 6 Disable Automatic Retransmission (read/write… member
/bsp/tae32f5300/Libraries/CMSIS/Device/Tai_action/TAE32F53xx/Include/
A Dtae32f53xx.h395 …__IO uint32_t DAR; /*!< Address offset: 0x08: DMA Channel Destination Address Registe… member
/bsp/rockchip/common/rk_hal/lib/CMSIS/Device/RK2108/Include/
A Drk2108.h329 __I uint32_t DAR; member
/bsp/fujitsu/mb9x/mb9bf506r/libraries/Device/FUJISTU/MB9BF50x/Include/
A Dmb9bf506r.h5991 __IO uint16_t DAR : 1; member
/bsp/renesas/ebf_qi_min_6m5/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/
A DR7FA6M5BH.h17642 …__IOM uint32_t DAR; /*!< (@ 0x00000004) Device Address Register … member
/bsp/fujitsu/mb9x/mb9bf568r/CMSIS/DeviceSupport/
A Dmb9b560r.h7477 __IO uint16_t DAR : 1; member
/bsp/renesas/ra2l1-cpk/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/
A Drenesas.h25804 …__IOM uint32_t DAR; /*!< (@ 0x00000004) Device Address Register … member
/bsp/renesas/ra6m4-cpk/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/
A Drenesas.h25804 …__IOM uint32_t DAR; /*!< (@ 0x00000004) Device Address Register … member
/bsp/renesas/ra6m4-iot/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/
A Drenesas.h25804 …__IOM uint32_t DAR; /*!< (@ 0x00000004) Device Address Register … member
/bsp/renesas/ra6m3-ek/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/
A Drenesas.h25804 …__IOM uint32_t DAR; /*!< (@ 0x00000004) Device Address Register … member

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