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Searched refs:DCTRL_RWSTART_BB (Results 1 – 6 of 6) sorted by relevance

/bsp/airm2m/air32f103/libraries/AIR32F10xLib/src/
A Dair32f10x_sdio.c53 #define DCTRL_RWSTART_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (RWSTART_BitNumber * 4)) macro
510 *(__IO uint32_t *) DCTRL_RWSTART_BB = (uint32_t) NewState; in SDIO_StartSDIOReadWait()
/bsp/n32/libraries/N32G4FR_Firmware_Library/n32g4fr_std_periph_driver/src/
A Dn32g4fr_sdio.c89 #define DCTRL_RWSTART_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (RWSTART_BIT_NUMBER * 4)) macro
535 *(__IO uint32_t*)DCTRL_RWSTART_BB = (uint32_t)Cmd; in SDIO_EnableReadWait()
/bsp/n32/libraries/N32G45x_Firmware_Library/n32g45x_std_periph_driver/src/
A Dn32g45x_sdio.c89 #define DCTRL_RWSTART_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (RWSTART_BIT_NUMBER * 4)) macro
535 *(__IO uint32_t*)DCTRL_RWSTART_BB = (uint32_t)Cmd; in SDIO_EnableReadWait()
/bsp/n32/libraries/N32WB452_Firmware_Library/n32wb452_std_periph_driver/src/
A Dn32wb452_sdio.c89 #define DCTRL_RWSTART_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (RWSTART_BIT_NUMBER * 4)) macro
535 *(__IO uint32_t*)DCTRL_RWSTART_BB = (uint32_t)Cmd; in SDIO_EnableReadWait()
/bsp/n32g452xx/Libraries/N32_Std_Driver/n32g45x_std_periph_driver/src/
A Dn32g45x_sdio.c89 #define DCTRL_RWSTART_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (RWSTART_BIT_NUMBER * 4)) macro
535 *(__IO uint32_t*)DCTRL_RWSTART_BB = (uint32_t)Cmd; in SDIO_EnableReadWait()
/bsp/stm32/libraries/STM32L1xx_HAL/STM32L1xx_HAL_Driver/Inc/
A Dstm32l1xx_ll_sdmmc.h673 #define DCTRL_RWSTART_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32U) + (RWSTART_BITNUMBER * 4U)) macro
923 #define __SDIO_START_READWAIT_ENABLE(__INSTANCE__) (*(__IO uint32_t *) DCTRL_RWSTART_BB = ENABLE)
930 #define __SDIO_START_READWAIT_DISABLE(__INSTANCE__) (*(__IO uint32_t *) DCTRL_RWSTART_BB = DISABLE)

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