| /bsp/CME_M7/CMSIS/CME_M7/ |
| A D | cmem7_it.c | 36 if (CoreDebug->DHCSR & 1) { // check C_DEBUGEN == 1-> Debugger Connected in HardFault_Handler()
47 if (CoreDebug->DHCSR & 1) { // check C_DEBUGEN == 1-> Debugger Connected in MemManage_Handler()
58 if (CoreDebug->DHCSR & 1) { // check C_DEBUGEN == 1-> Debugger Connected in BusFault_Handler()
69 if (CoreDebug->DHCSR & 1) { // check C_DEBUGEN == 1-> Debugger Connected in UsageFault_Handler()
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| /bsp/efm32/Libraries/emlib/inc/ |
| A D | em_dbg.h | 71 if (CoreDebug->DHCSR & CoreDebug_DHCSR_C_DEBUGEN_Msk) in DBG_Connected()
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| /bsp/efm32/ |
| A D | board.c | 229 CoreDebug->DHCSR |= 1; in Swo_Configuration()
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| /bsp/renesas/ra4e2-eco/ra/arm/CMSIS_6/CMSIS/Core/Include/ |
| A D | core_cm3.h | 1243 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
1414 __IOM uint32_t DHCSR; member
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| A D | core_sc300.h | 1226 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
1397 __IOM uint32_t DHCSR; member
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| /bsp/renesas/ra6e2-fpb/ra/arm/CMSIS_6/CMSIS/Core/Include/ |
| A D | core_cm3.h | 1243 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
1414 __IOM uint32_t DHCSR; member
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| A D | core_sc300.h | 1226 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
1397 __IOM uint32_t DHCSR; member
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| /bsp/synwit/libraries/SWM341_CSL/CMSIS/CoreSupport/ |
| A D | core_armv8mbl.h | 993 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
1094 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
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| A D | core_cm23.h | 1068 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
1169 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
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| /bsp/ht32/libraries/HT32_STD_5xxxx_FWLib/library/CMSIS/Core/Include/ |
| A D | core_cm23.h | 1068 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
1169 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
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| A D | core_armv8mbl.h | 993 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
1094 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
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| /bsp/renesas/ra8d1-vision-board/ra/arm/CMSIS_5/CMSIS/Core/Include/ |
| A D | core_armv8mbl.h | 993 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
1094 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
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| A D | core_cm23.h | 1068 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
1169 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
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| /bsp/rockchip/common/rk_hal/lib/CMSIS/Core/Include/ |
| A D | core_cm23.h | 1068 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
1169 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
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| A D | core_armv8mbl.h | 993 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
1094 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
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| /bsp/tae32f5300/Libraries/CMSIS/Include/ |
| A D | core_armv8mbl.h | 993 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
1094 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
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| A D | core_cm23.h | 1068 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
1169 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
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| /bsp/renesas/ra6m4-cpk/ra/arm/CMSIS_5/CMSIS/Core/Include/ |
| A D | core_cm23.h | 1068 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
1169 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
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| A D | core_armv8mbl.h | 993 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
1094 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
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| /bsp/renesas/ra8m1-ek/ra/arm/CMSIS_5/CMSIS/Core/Include/ |
| A D | core_armv8mbl.h | 993 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
1094 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
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| A D | core_cm23.h | 1068 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
1169 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
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| /bsp/renesas/ra8d1-ek/ra/arm/CMSIS_5/CMSIS/Core/Include/ |
| A D | core_armv8mbl.h | 993 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
1094 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
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| A D | core_cm23.h | 1068 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
1169 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
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| /bsp/ht32/libraries/HT32_STD_1xxxx_FWLib/library/CMSIS/Core/Include/ |
| A D | core_armv8mbl.h | 993 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
1094 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
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| /bsp/renesas/ra6m3-hmi-board/ra/arm/CMSIS_5/CMSIS/Core/Include/ |
| A D | core_armv8mbl.h | 993 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
1094 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
|