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Searched refs:DIVSEL (Results 1 – 9 of 9) sorted by relevance

/bsp/microchip/saml10/bsp/include/component/
A Dgclk.h126 … uint32_t DIVSEL:1; /**< bit: 12 Divide Selection */ member
/bsp/microchip/samc21/bsp/samc21/include/component/
A Dgclk.h142 uint32_t DIVSEL:1; /*!< bit: 12 Divide Selection */ member
/bsp/samd21/sam_d2x_asflib/sam0/drivers/system/clock/clock_samd20/
A Dgclk.c313 uint8_t divsel = GCLK->GENCTRL.bit.DIVSEL; in system_gclk_gen_get_hz()
/bsp/samd21/sam_d2x_asflib/sam0/drivers/system/clock/clock_samd21_r21_da_ha1/
A Dgclk.c313 uint8_t divsel = GCLK->GENCTRL.bit.DIVSEL; in system_gclk_gen_get_hz()
/bsp/samd21/sam_d2x_asflib/sam0/utils/cmsis/samd21/include/component/
A Dgclk.h224 uint32_t DIVSEL:1; /*!< bit: 20 Divide Selection */ member
/bsp/samd21/sam_d2x_asflib/sam0/utils/cmsis/samd20/include/component/
A Dgclk.h209 uint32_t DIVSEL:1; /*!< bit: 20 Divide Selection */ member
/bsp/microchip/samd51-seeed-wio-terminal/bsp/samd51a/include/component/
A Dgclk.h157 uint32_t DIVSEL:1; /*!< bit: 12 Divide Selection */ member
/bsp/microchip/samd51-adafruit-metro-m4/bsp/samd51a/include/component/
A Dgclk.h157 uint32_t DIVSEL:1; /*!< bit: 12 Divide Selection */ member
/bsp/microchip/same54/bsp/include/component/
A Dgclk.h157 uint32_t DIVSEL:1; /*!< bit: 12 Divide Selection */ member

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