Searched refs:DLR (Results 1 – 14 of 14) sorted by relevance
37 uint32 DLR; /* 0x0164: Datalogger Register */ member
214 USARTx->DLR = uIPClock / (u32)USART_InitStruct->USART_BaudRate; in USART_Init()
1398 this_uart->hw_reg->DLR = (uint8_t)baud_value; in config_baud_divisors()1421 this_uart->hw_reg->DLR = (uint8_t)baud_value; in config_baud_divisors()
204 USARTx->DLR = uIPClock / (u32)USART_InitStruct->USART_BaudRate; in USART_Init()
414 …__IO uint32_t DLR; /*!< 0x038 Divisor Latch Register … member426 …__IO uint32_t DLR; /*!< 0x024 Divisor Latch Register …
153 __IO uint8_t DLR; member
643 …__IO uint32_t DLR; /*!< 0x024 Divisor Latch Register … member
5956 …__IM uint32_t DLR : 1; /*!< [17..17] Display list reader feature … member
6831 …__IM uint32_t DLR : 1; /*!< [17..17] Display list reader feature … member
9675 …__IM uint32_t DLR : 1; /*!< [17..17] Display list reader feature … member
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