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Searched refs:DMA (Results 1 – 25 of 466) sorted by relevance

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/bsp/synwit/libraries/SWM341_CSL/SWM341_StdPeriph_Driver/
A DSWM341_dma.c53 DMA->CH[chn].MUX = 0; in DMA_CH_Init()
88 DMA->PRI &= ~(1 << chn); in DMA_CH_Init()
91 DMA->IM |= (1 << chn); // 默认全部关闭 in DMA_CH_Init()
92 DMA->DSTSGIM |= (3 << (chn * 2)); in DMA_CH_Init()
93 DMA->SRCSGIM |= (3 << (chn * 2)); in DMA_CH_Init()
94 DMA->IE |= (1 << chn); // 标志总是可查 in DMA_CH_Init()
164 DMA->CH[chn].SRC = address; in DMA_CH_SetSrcAddress()
177 DMA->CH[chn].DST = address; in DMA_CH_SetDstAddress()
191 DMA->IM &= ~(it << chn); in DMA_CH_INTEn()
207 DMA->IM |= (it << chn); in DMA_CH_INTDis()
[all …]
/bsp/CME_M7/StdPeriph_Driver/src/
A Dcmem7_dma.c92 DMA->DMA_EN_b.EN = TRUE; in DMA_Init()
100 DMA->SAR0 = 0x0; in DMA_Init()
101 DMA->DAR0 = 0x0; in DMA_Init()
119 DMA->LLP0_b.LOC = 0; in DMA_Init()
120 DMA->LLP0_b.LMS = 0; in DMA_Init()
122 DMA->SGR0_b.SGC = 0x1; in DMA_Init()
123 DMA->SGR0_b.SGI = 0x0; in DMA_Init()
125 DMA->DSR0_b.DSC = 0x0; in DMA_Init()
126 DMA->DSR0_b.DSI = 0x0; in DMA_Init()
128 DMA->SSTATAR0 = 0x0; in DMA_Init()
[all …]
/bsp/Vango/v85xx/Libraries/VangoV85xx_standard_peripheral/Source/
A Dlib_dma.c35 addr = &DMA->C0CTL + Channel*4; in DMA_DeInit()
39 DMA->IE &= ~((1<<(Channel))\ in DMA_DeInit()
44 DMA->STS = (1<<(Channel+4))\ in DMA_DeInit()
49 addr = &DMA->C0CTL + Channel*4; in DMA_DeInit()
53 addr = &DMA->C0SRC + Channel*4; in DMA_DeInit()
215 tmp = DMA->AESCTL; in DMA_AESInit()
220 DMA->AESCTL = tmp; in DMA_AESInit()
266 DMA->IE |= INTMask; in DMA_INTConfig()
268 DMA->IE &= ~INTMask; in DMA_INTConfig()
297 if (DMA->STS&INTMask) in DMA_GetINTStatus()
[all …]
/bsp/Vango/v85xxp/Libraries/VangoV85xxP_standard_peripheral/Source/
A Dlib_dma.c35 addr = &DMA->C0CTL + Channel*4; in DMA_DeInit()
39 DMA->IE &= ~((1<<(Channel))\ in DMA_DeInit()
44 DMA->STS = (1<<(Channel+4))\ in DMA_DeInit()
49 addr = &DMA->C0CTL + Channel*4; in DMA_DeInit()
53 addr = &DMA->C0SRC + Channel*4; in DMA_DeInit()
246 tmp = DMA->AESCTL; in DMA_AESInit()
251 DMA->AESCTL = tmp; in DMA_AESInit()
297 DMA->IE |= INTMask; in DMA_INTConfig()
299 DMA->IE &= ~INTMask; in DMA_INTConfig()
328 if (DMA->STS&INTMask) in DMA_GetINTStatus()
[all …]
/bsp/airm2m/air105/libraries/HAL_Driver/Src/
A Dcore_dma.c149 if (DMA->ChEnReg_L & BaseIndex) in DMA_CheckStreamBusy()
183 …if((DMA->RawBlock_L & tmpChannelxBit) | (DMA->RawDstTran_L & tmpChannelxBit) | (DMA->RawErr_L & tm… in DMA_ConfigStream()
184 …| (DMA->RawSrcTran_L & tmpChannelxBit) | (DMA->RawTfr_L & tmpChannelxBit) | (DMA->StatusBlock_L &… in DMA_ConfigStream()
185 …| (DMA->StatusDstTran_L & tmpChannelxBit) | (DMA->StatusErr_L & tmpChannelxBit) | (DMA->StatusSrcT… in DMA_ConfigStream()
295 DMA->ChEnReg_L = tmpChannelxBit; in DMA_ForceStartStream()
359 DMA->ClearBlock_L = 0x000000ff; in DMA_IrqHandle()
372 DMA->DmaCfgReg_L = 1; in DMA_GlobalInit()
373 DMA->ChEnReg_L = 0x0000ff00; in DMA_GlobalInit()
375 DMA->MaskTfr_L = 0x0000ffff; in DMA_GlobalInit()
376 DMA->MaskErr_L = 0x0000ffff; in DMA_GlobalInit()
[all …]
/bsp/efm32/Libraries/emlib/src/
A Dem_dma.c234 DMA->CHUSEBURSTS = chBit; in DMA_Prepare()
238 DMA->CHUSEBURSTC = chBit; in DMA_Prepare()
243 DMA->CHALTC = chBit; in DMA_Prepare()
247 DMA->CHALTS = chBit; in DMA_Prepare()
287 pending = DMA->IF; in DMA_IRQHandler()
299 prio = DMA->CHPRIS; in DMA_IRQHandler()
459 DMA->CHENS = 1 << channel; in DMA_ActivateBasic()
659 DMA->CHALTC = chBit; in DMA_ActivateScatterGather()
662 DMA->CHENS = chBit; in DMA_ActivateScatterGather()
668 DMA->CHSWREQ = chBit; in DMA_ActivateScatterGather()
[all …]
/bsp/synwit/libraries/SWM320_CSL/SWM320_StdPeriph_Driver/
A DSWM320_dma.c43 DMA->CH[chn].SRC = src_addr; in DMA_CHM_Config()
44 DMA->CH[chn].DST = dst_addr; in DMA_CHM_Config()
53 DMA->IF = (1 << chn); //清除中断标志 in DMA_CHM_Config()
54 DMA->IE |= (1 << chn); in DMA_CHM_Config()
55 if(int_en) DMA->IM &= ~(1 << chn); in DMA_CHM_Config()
56 else DMA->IM |= (1 << chn); in DMA_CHM_Config()
77 DMA->CH[chn].CR |= (1 << DMA_CR_TXEN_Pos); in DMA_CH_Open()
101 DMA->IM &= ~(1 << chn); in DMA_CH_INTEn()
113 DMA->IM |= (1 << chn); in DMA_CH_INTDis()
125 DMA->IF = (1 << chn); in DMA_CH_INTClr()
[all …]
/bsp/essemi/es32vf2264/libraries/ALD/ES32VF2264/Source/
A Dald_dma.c157 hperh.perh = DMA; in ald_dma_config_basic_easy()
179 if (READ_BIT(DMA->IFM, 1U << (2U * i))) in ald_dma_irq_handler()
184 DMA->ICR = 1U << (2U * i); in ald_dma_irq_handler()
192 DMA->ICR = 1U << (2U * i + 1U); in ald_dma_irq_handler()
221 WRITE_REG(DMA->IDR, 0x3FFF); in ald_dma_reset()
222 WRITE_REG(DMA->ICR, 0x3FFF); in ald_dma_reset()
227 WRITE_REG(DMA->CHANNEL[i].CON, 0x0); in ald_dma_reset()
228 WRITE_REG(DMA->CHANNEL[i].SAR, 0x0); in ald_dma_reset()
229 WRITE_REG(DMA->CHANNEL[i].DAR, 0x0); in ald_dma_reset()
230 WRITE_REG(DMA->CHANNEL[i].NDT, 0x0); in ald_dma_reset()
[all …]
/bsp/nxp/imx/imxrt/imxrt1052-seeed-ArchMix/board/
A DKconfig21 bool "Enable DMA"
40 bool "Enable LPUART1 RX DMA"
48 int "Set LPUART1 RX DMA channel (0-32)"
52 bool "Enable LPUART1 TX DMA"
60 int "Set LPUART1 TX DMA channel (0-32)"
68 bool "Enable LPUART4 RX DMA"
76 int "Set LPUART4 RX DMA channel (0-32)"
80 bool "Enable LPUART4 TX DMA"
104 bool "Enable SPI3 DMA xfer"
111 int "Set SPI3 RX DMA channel (0-32)"
[all …]
/bsp/nxp/imx/imxrt/imxrt1052-atk-commander/board/
A DKconfig13 bool "Enable DMA"
32 bool "Enable LPUART1 RX DMA"
40 int "Set LPUART1 RX DMA channel (0-32)"
44 bool "Enable LPUART1 TX DMA"
52 int "Set LPUART1 TX DMA channel (0-32)"
60 bool "Enable LPUART4 RX DMA"
68 int "Set LPUART4 RX DMA channel (0-32)"
72 bool "Enable LPUART4 TX DMA"
96 bool "Enable SPI3 DMA xfer"
103 int "Set SPI3 RX DMA channel (0-32)"
[all …]
/bsp/nxp/imx/imxrt/imxrt1061-forlinx-OK1061-S/board/
A DKconfig13 bool "Enable DMA"
32 bool "Enable LPUART1 RX DMA"
40 int "Set LPUART1 RX DMA channel (0-32)"
44 bool "Enable LPUART1 TX DMA"
52 int "Set LPUART1 TX DMA channel (0-32)"
60 bool "Enable LPUART2 RX DMA"
68 int "Set LPUART2 RX DMA channel (0-32)"
72 bool "Enable LPUART2 TX DMA"
80 int "Set LPUART2 TX DMA channel (0-32)"
/bsp/stm32/stm32l4r5-st-nucleo/board/
A DKconfig29 bool "Enable uart using DMA"
35 bool "Enable LPUART1 RX DMA"
44 bool "Enable UART1 RX DMA"
49 bool "Enable UART1 TX DMA"
77 bool "Enable UART2 RX DMA"
254 bool "Enable SPI1 TX DMA"
258 bool "Enable SPI1 RX DMA"
266 bool "Enable SPI2 TX DMA"
270 bool "Enable SPI2 RX DMA"
278 bool "Enable SPI3 TX DMA"
[all …]
/bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Src/
A Dfm33lc0xx_fl_flash.c451 FL_DMA_Disable(DMA); in FL_FLASH_Write_Dma()
467 FL_DMA_Init(DMA, &initStruct, FL_DMA_CHANNEL_7); in FL_FLASH_Write_Dma()
468 FL_DMA_WriteFlashAddress(DMA, address >> 2); in FL_FLASH_Write_Dma()
471 FL_DMA_ClearFlag_TransferComplete(DMA, FL_DMA_CHANNEL_7); in FL_FLASH_Write_Dma()
472 FL_DMA_EnableChannel(DMA, FL_DMA_CHANNEL_7); in FL_FLASH_Write_Dma()
473 FL_DMA_Enable(DMA); in FL_FLASH_Write_Dma()
489 FL_DMA_Disable(DMA); in FL_FLASH_Write_Dma()
526 FL_DMA_Init(DMA, &initStruct, FL_DMA_CHANNEL_7); in FL_FLASH_Read_Dma()
527 FL_DMA_WriteFlashAddress(DMA, address >> 2); in FL_FLASH_Read_Dma()
531 FL_DMA_EnableChannel(DMA, FL_DMA_CHANNEL_7); in FL_FLASH_Read_Dma()
[all …]
/bsp/frdm-k64f/device/TOOLCHAIN_ARM_STD/
A Dstartup_MK64F12.s611 DMA0_IRQHandler ; DMA Channel 0 Transfer Complete
612 DMA1_IRQHandler ; DMA Channel 1 Transfer Complete
613 DMA2_IRQHandler ; DMA Channel 2 Transfer Complete
614 DMA3_IRQHandler ; DMA Channel 3 Transfer Complete
615 DMA4_IRQHandler ; DMA Channel 4 Transfer Complete
616 DMA5_IRQHandler ; DMA Channel 5 Transfer Complete
617 DMA6_IRQHandler ; DMA Channel 6 Transfer Complete
618 DMA7_IRQHandler ; DMA Channel 7 Transfer Complete
619 DMA8_IRQHandler ; DMA Channel 8 Transfer Complete
620 DMA9_IRQHandler ; DMA Channel 9 Transfer Complete
[all …]
/bsp/gd32/arm/gd32470z-lckfb/board/
A DKconfig35 bool "Enable UART0 RX DMA"
41 bool "Enable UART0 TX DMA"
69 bool "Enable UART1 RX DMA"
75 bool "Enable UART1 TX DMA"
103 bool "Enable UART2 RX DMA"
109 bool "Enable UART2 TX DMA"
137 bool "Enable UART3 RX DMA"
143 bool "Enable UART3 TX DMA"
171 bool "Enable UART4 RX DMA"
177 bool "Enable UART4 TX DMA"
[all …]
/bsp/tae32f5300/drivers/
A DKconfig30 bool "Enable UART0 RX DMA"
35 bool "Enable UART0 TX DMA"
44 bool "Enable UART1 RX DMA"
49 bool "Enable UART1 TX DMA"
81 bool "Enable SPI1 TX DMA"
86 bool "Enable SPI1 RX DMA"
96 bool "Enable SPI2 TX DMA"
101 bool "Enable SPI2 RX DMA"
111 bool "Enable SPI3 TX DMA"
116 bool "Enable SPI3 RX DMA"
[all …]
/bsp/gd32/arm/gd32407v-start/board/
A DKconfig35 bool "Enable UART0 RX DMA"
41 bool "Enable UART0 TX DMA"
69 bool "Enable UART1 RX DMA"
75 bool "Enable UART1 TX DMA"
103 bool "Enable UART2 RX DMA"
109 bool "Enable UART2 TX DMA"
137 bool "Enable UART3 RX DMA"
143 bool "Enable UART3 TX DMA"
171 bool "Enable UART4 RX DMA"
245 bool "Enable SPI1 TX DMA"
[all …]
/bsp/at32/at32a423-start/board/
A DKconfig224 bool "Enable SPI1 TX DMA"
229 bool "Enable SPI1 RX DMA"
239 bool "Enable SPI2 TX DMA"
244 bool "Enable SPI2 RX DMA"
254 bool "Enable SPI3 TX DMA"
259 bool "Enable SPI3 RX DMA"
308 bool "Enable I2C1 TX DMA"
313 bool "Enable I2C1 RX DMA"
323 bool "Enable I2C2 TX DMA"
328 bool "Enable I2C2 RX DMA"
[all …]
/bsp/at32/at32f423-start/board/
A DKconfig224 bool "Enable SPI1 TX DMA"
229 bool "Enable SPI1 RX DMA"
239 bool "Enable SPI2 TX DMA"
244 bool "Enable SPI2 RX DMA"
254 bool "Enable SPI3 TX DMA"
259 bool "Enable SPI3 RX DMA"
308 bool "Enable I2C1 TX DMA"
313 bool "Enable I2C1 RX DMA"
323 bool "Enable I2C2 TX DMA"
328 bool "Enable I2C2 RX DMA"
[all …]
/bsp/stm32/stm32f103-onenet-nbiot/board/
A DKconfig35 bool "Enable UART1 RX DMA"
40 bool "Enable UART1 TX DMA"
57 int "Set UART1 RX DMA ping-pong buffer size"
68 bool "Enable UART2 RX DMA"
73 bool "Enable UART2 TX DMA"
90 int "Set UART2 RX DMA ping-pong buffer size"
101 bool "Enable UART3 RX DMA"
106 bool "Enable UART3 TX DMA"
123 int "Set UART3 RX DMA ping-pong buffer size"
134 bool "Enable UART4 RX DMA"
[all …]
/bsp/gd32/arm/gd32450z-eval/board/
A DKconfig35 bool "Enable UART0 RX DMA"
41 bool "Enable UART0 TX DMA"
69 bool "Enable UART1 RX DMA"
75 bool "Enable UART1 TX DMA"
103 bool "Enable UART2 RX DMA"
109 bool "Enable UART2 TX DMA"
137 bool "Enable UART3 RX DMA"
143 bool "Enable UART3 TX DMA"
171 bool "Enable UART4 RX DMA"
177 bool "Enable UART4 TX DMA"
[all …]
/bsp/at32/at32f425-start/board/
A DKconfig78 bool "Enable UART1 RX DMA"
224 bool "Enable SPI1 TX DMA"
229 bool "Enable SPI1 RX DMA"
239 bool "Enable SPI2 TX DMA"
244 bool "Enable SPI2 RX DMA"
254 bool "Enable SPI3 TX DMA"
259 bool "Enable SPI3 RX DMA"
308 bool "Enable I2C1 TX DMA"
313 bool "Enable I2C1 RX DMA"
323 bool "Enable I2C2 TX DMA"
[all …]
/bsp/nxp/imx/imxrt/imxrt1052-nxp-evk/board/
A DKconfig18 bool "Enable DMA"
37 bool "Enable LPUART1 RX DMA"
45 int "Set LPUART1 RX DMA channel (0-32)"
49 bool "Enable LPUART1 TX DMA"
57 int "Set LPUART1 TX DMA channel (0-32)"
65 bool "Enable LPUART3 RX DMA"
73 int "Set LPUART3 RX DMA channel (0-32)"
77 bool "Enable LPUART3 TX DMA"
85 int "Set LPUART3 TX DMA channel (0-32)"
168 bool "Enable AUDIO DMA"
[all …]
/bsp/essemi/es32vf2264/drivers/ES/
A DKconfig10 bool "EUART0 using DMA TX"
14 bool "EUART0 using DMA RX"
26 bool "EUART1 using DMA TX"
30 bool "EUART1 using DMA RX"
42 bool "CUART0 using DMA TX"
46 bool "CUART0 using DMA RX"
58 bool "CUART1 using DMA TX"
62 bool "CUART1 using DMA RX"
74 bool "CUART2 using DMA TX"
78 bool "CUART2 using DMA RX"
[all …]
/bsp/gd32/arm/gd32407v-lckfb/board/
A DKconfig55 bool "Enable UART0 RX DMA"
61 bool "Enable UART0 TX DMA"
89 bool "Enable UART1 RX DMA"
95 bool "Enable UART1 TX DMA"
123 bool "Enable UART2 RX DMA"
129 bool "Enable UART2 TX DMA"
157 bool "Enable UART3 RX DMA"
163 bool "Enable UART3 TX DMA"
191 bool "Enable UART4 RX DMA"
265 bool "Enable SPI1 TX DMA"
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