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Searched refs:DMA1 (Results 1 – 25 of 209) sorted by relevance

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/bsp/apm32/libraries/APM32S10x_Library/APM32S10x_StdPeriphDriver/src/
A Dapm32s10x_dma.c58 DMA1->INTFCLR |= 0xFFFFFFF0; in DMA_Reset()
62 DMA1->INTFCLR |= 0xFFFFFF0F; in DMA_Reset()
66 DMA1->INTFCLR |= 0xFFFFF0FF; in DMA_Reset()
70 DMA1->INTFCLR |= 0xFFFF0FFF; in DMA_Reset()
74 DMA1->INTFCLR |= 0xFFF0FFFF; in DMA_Reset()
78 DMA1->INTFCLR |= 0xFF0FFFFF; in DMA_Reset()
82 DMA1->INTFCLR |= 0xF0FFFFFF; in DMA_Reset()
257 if ((DMA1->INTSTS & flag) != RESET) in DMA_ReadStatusFlag()
305 DMA1->INTFCLR = flag; in DMA_ClearStatusFlag()
346 if ((DMA1->INTSTS & flag) != RESET) in DMA_ReadIntFlag()
[all …]
/bsp/mm32/libraries/HAL_Drivers/config/mm32f3277g8p/
A Ddma_config.h23 #define ADC1_DMA_INSTANCE DMA1
29 #define UART6_DMA_INSTANCE DMA1
38 #define ADC2_DMA_INSTANCE DMA1
44 #define SPI1_RX_DMA_INSTANCE DMA1
50 #define UART3_TX_DMA_INSTANCE DMA1
59 #define SPI1_TX_DMA_INSTANCE DMA1
65 #define UART3_RX_DMA_INSTANCE DMA1
74 #define SPI2_RX_DMA_INSTANCE DMA1
80 #define UART1_TX_DMA_INSTANCE DMA1
89 #define SPI2_TX_DMA_INSTANCE DMA1
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/bsp/hk32/libraries/HK32F0xx_StdPeriph_Driver/src/
A Dhk32f0xx_dma.c125 DMA1->IFCR |= DMA1_CHANNEL1_IT_MASK; in DMA_DeInit()
130 DMA1->IFCR |= DMA1_CHANNEL2_IT_MASK; in DMA_DeInit()
135 DMA1->IFCR |= DMA1_CHANNEL3_IT_MASK; in DMA_DeInit()
140 DMA1->IFCR |= DMA1_CHANNEL4_IT_MASK; in DMA_DeInit()
145 DMA1->IFCR |= DMA1_CHANNEL5_IT_MASK; in DMA_DeInit()
469 tmpreg = DMA1->ISR ; in DMA_GetFlagStatus()
528 DMA1->IFCR = DMAy_FLAG; in DMA_ClearFlag()
576 tmpreg = DMA1->ISR; in DMA_GetITStatus()
638 DMA1->IFCR = DMA1_IT_TC1 | DMA1_IT_HT1 | DMA1_IT_TE1; in DMA_ClearITPendingBit()
641 DMA1->IFCR = DMA1_IT_TC2 | DMA1_IT_HT2 | DMA1_IT_TE2; in DMA_ClearITPendingBit()
[all …]
/bsp/apm32/libraries/APM32E10x_Library/APM32E10x_StdPeriphDriver/src/
A Dapm32e10x_dma.c60 DMA1->INTFCLR |= 0xFFFFFFF0; in DMA_Reset()
64 DMA1->INTFCLR |= 0xFFFFFF0F; in DMA_Reset()
68 DMA1->INTFCLR |= 0xFFFFF0FF; in DMA_Reset()
72 DMA1->INTFCLR |= 0xFFFF0FFF; in DMA_Reset()
76 DMA1->INTFCLR |= 0xFFF0FFFF; in DMA_Reset()
80 DMA1->INTFCLR |= 0xFF0FFFFF; in DMA_Reset()
84 DMA1->INTFCLR |= 0xF0FFFFFF; in DMA_Reset()
328 if((DMA1->INTSTS & flag ) != RESET ) in DMA_ReadStatusFlag()
403 DMA1->INTFCLR = flag; in DMA_ClearStatusFlag()
478 if((DMA1->INTSTS & flag ) != RESET ) in DMA_ReadIntFlag()
[all …]
/bsp/apm32/libraries/APM32F10x_Library/APM32F10x_StdPeriphDriver/src/
A Dapm32f10x_dma.c60 DMA1->INTFCLR |= 0xFFFFFFF0; in DMA_Reset()
64 DMA1->INTFCLR |= 0xFFFFFF0F; in DMA_Reset()
68 DMA1->INTFCLR |= 0xFFFFF0FF; in DMA_Reset()
72 DMA1->INTFCLR |= 0xFFFF0FFF; in DMA_Reset()
76 DMA1->INTFCLR |= 0xFFF0FFFF; in DMA_Reset()
80 DMA1->INTFCLR |= 0xFF0FFFFF; in DMA_Reset()
84 DMA1->INTFCLR |= 0xF0FFFFFF; in DMA_Reset()
329 if ((DMA1->INTSTS & flag) != RESET) in DMA_ReadStatusFlag()
407 DMA1->INTFCLR = flag; in DMA_ClearStatusFlag()
485 if ((DMA1->INTSTS & flag) != RESET) in DMA_ReadIntFlag()
[all …]
/bsp/mm32l3xx/Libraries/MM32L3xx/HAL_lib/src/
A DHAL_dma.c127 DMA1->IFCR |= DMA1_Channel1_IT_Mask; in DMA_DeInit()
131 DMA1->IFCR |= DMA1_Channel2_IT_Mask; in DMA_DeInit()
135 DMA1->IFCR |= DMA1_Channel3_IT_Mask; in DMA_DeInit()
139 DMA1->IFCR |= DMA1_Channel4_IT_Mask; in DMA_DeInit()
143 DMA1->IFCR |= DMA1_Channel5_IT_Mask; in DMA_DeInit()
147 DMA1->IFCR |= DMA1_Channel6_IT_Mask; in DMA_DeInit()
151 DMA1->IFCR |= DMA1_Channel7_IT_Mask; in DMA_DeInit()
366 tmpreg = DMA1->ISR ; in DMA_GetFlagStatus()
425 DMA1->IFCR = DMA_FLAG; in DMA_ClearFlag()
471 tmpreg = DMA1->ISR ; in DMA_GetITStatus()
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/bsp/mm32f103x/Libraries/MM32F103/HAL_lib/src/
A DHAL_dma.c127 DMA1->IFCR |= DMA1_Channel1_IT_Mask; in DMA_DeInit()
131 DMA1->IFCR |= DMA1_Channel2_IT_Mask; in DMA_DeInit()
135 DMA1->IFCR |= DMA1_Channel3_IT_Mask; in DMA_DeInit()
139 DMA1->IFCR |= DMA1_Channel4_IT_Mask; in DMA_DeInit()
143 DMA1->IFCR |= DMA1_Channel5_IT_Mask; in DMA_DeInit()
147 DMA1->IFCR |= DMA1_Channel6_IT_Mask; in DMA_DeInit()
151 DMA1->IFCR |= DMA1_Channel7_IT_Mask; in DMA_DeInit()
366 tmpreg = DMA1->ISR ; in DMA_GetFlagStatus()
425 DMA1->IFCR = DMA_FLAG; in DMA_ClearFlag()
471 tmpreg = DMA1->ISR ; in DMA_GetITStatus()
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/bsp/apm32/libraries/APM32F0xx_Library/APM32F0xx_StdPeriphDriver/src/
A Dapm32f0xx_dma.c95 DMA1->INTFCLR = (uint32_t)0x0000000F; in DMA_Reset()
99 DMA1->INTFCLR = (uint32_t)0x000000F0; in DMA_Reset()
103 DMA1->INTFCLR = (uint32_t)0x00000F00; in DMA_Reset()
107 DMA1->INTFCLR = (uint32_t)0x0000F000; in DMA_Reset()
111 DMA1->INTFCLR = (uint32_t)0x000F0000; in DMA_Reset()
115 DMA1->INTFCLR = (uint32_t)0x00F00000; in DMA_Reset()
119 DMA1->INTFCLR = (uint32_t)0x0F000000; in DMA_Reset()
461 status = DMA1->INTSTS & ((uint32_t)flag & 0x0FFFFFFF); in DMA_ReadStatusFlag()
539 DMA1->INTFCLR |= (uint32_t)(flag & 0x0FFFFFFF); in DMA_ClearStatusFlag()
611 status = DMA1->INTSTS & ((uint32_t)flag & 0x0FFFFFFF); in DMA_ReadIntFlag()
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/bsp/wch/risc-v/Libraries/CH32V10x_StdPeriph_Driver/StdPeriph_Driver/src/
A Dch32v10x_dma.c55 DMA1->INTFCR |= DMA1_Channel1_IT_Mask; in DMA_DeInit()
59 DMA1->INTFCR |= DMA1_Channel2_IT_Mask; in DMA_DeInit()
63 DMA1->INTFCR |= DMA1_Channel3_IT_Mask; in DMA_DeInit()
67 DMA1->INTFCR |= DMA1_Channel4_IT_Mask; in DMA_DeInit()
71 DMA1->INTFCR |= DMA1_Channel5_IT_Mask; in DMA_DeInit()
75 DMA1->INTFCR |= DMA1_Channel6_IT_Mask; in DMA_DeInit()
79 DMA1->INTFCR |= DMA1_Channel7_IT_Mask; in DMA_DeInit()
316 tmpreg = DMA1->INTFR; in DMA_GetFlagStatus()
396 DMA1->INTFCR = DMAy_FLAG; in DMA_ClearFlag()
469 tmpreg = DMA1->INTFR; in DMA_GetITStatus()
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/bsp/wch/arm/Libraries/CH32F10x_StdPeriph_Driver/StdPeriph_Driver/src/
A Dch32f10x_dma.c52 DMA1->INTFCR |= DMA1_Channel1_IT_Mask; in DMA_DeInit()
56 DMA1->INTFCR |= DMA1_Channel2_IT_Mask; in DMA_DeInit()
60 DMA1->INTFCR |= DMA1_Channel3_IT_Mask; in DMA_DeInit()
64 DMA1->INTFCR |= DMA1_Channel4_IT_Mask; in DMA_DeInit()
68 DMA1->INTFCR |= DMA1_Channel5_IT_Mask; in DMA_DeInit()
72 DMA1->INTFCR |= DMA1_Channel6_IT_Mask; in DMA_DeInit()
76 DMA1->INTFCR |= DMA1_Channel7_IT_Mask; in DMA_DeInit()
300 tmpreg = DMA1->INTFR ; in DMA_GetFlagStatus()
378 DMA1->INTFCR = DMAy_FLAG; in DMA_ClearFlag()
448 tmpreg = DMA1->INTFR; in DMA_GetITStatus()
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/bsp/mm32l07x/Libraries/MM32L0xx/HAL_lib/src/
A DHAL_dma.c124 DMA1->IFCR |= DMA1_Channel1_IT_Mask; in DMA_DeInit()
128 DMA1->IFCR |= DMA1_Channel2_IT_Mask; in DMA_DeInit()
132 DMA1->IFCR |= DMA1_Channel3_IT_Mask; in DMA_DeInit()
136 DMA1->IFCR |= DMA1_Channel4_IT_Mask; in DMA_DeInit()
140 DMA1->IFCR |= DMA1_Channel5_IT_Mask; in DMA_DeInit()
356 tmpreg = DMA1->ISR ; in DMA_GetFlagStatus()
415 DMA1->IFCR = DMA_FLAG; in DMA_ClearFlag()
461 tmpreg = DMA1->ISR ; in DMA_GetITStatus()
519 DMA1->IFCR = DMA_IT; in DMA_ClearITPendingBit()
/bsp/tkm32F499/Libraries/Hal_lib/src/
A DHAL_dma_bak.c128 DMA1->IFCR |= DMA1_Channel1_IT_Mask;
132 DMA1->IFCR |= DMA1_Channel2_IT_Mask;
136 DMA1->IFCR |= DMA1_Channel3_IT_Mask;
140 DMA1->IFCR |= DMA1_Channel4_IT_Mask;
144 DMA1->IFCR |= DMA1_Channel5_IT_Mask;
360 tmpreg = DMA1->ISR ;
419 DMA1->IFCR = DMA_FLAG;
465 tmpreg = DMA1->ISR ;
523 DMA1->IFCR = DMA_IT;
A DHAL_dma.c131 DMA1->IFCR |= DMA1_Channel1_IT_Mask; in DMA_DeInit()
136 DMA1->IFCR |= DMA1_Channel2_IT_Mask; in DMA_DeInit()
141 DMA1->IFCR |= DMA1_Channel3_IT_Mask; in DMA_DeInit()
146 DMA1->IFCR |= DMA1_Channel4_IT_Mask; in DMA_DeInit()
151 DMA1->IFCR |= DMA1_Channel5_IT_Mask; in DMA_DeInit()
156 DMA1->IFCR |= DMA1_Channel6_IT_Mask; in DMA_DeInit()
161 DMA1->IFCR |= DMA1_Channel7_IT_Mask; in DMA_DeInit()
450 tmpreg = DMA1->ISR ; in DMA_GetFlagStatus()
537 DMA1->IFCR = DMAy_FLAG; in DMA_ClearFlag()
612 tmpreg = DMA1->ISR; in DMA_GetITStatus()
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/bsp/apm32/libraries/APM32F4xx_Library/APM32F4xx_StdPeriphDriver/src/
A Dapm32f4xx_dma.c63 DMA1->LIFCLR |= 0x0000003D; in DMA_Reset()
67 DMA1->LIFCLR |= 0X00000F40; in DMA_Reset()
71 DMA1->LIFCLR |= 0x003D0000; in DMA_Reset()
75 DMA1->LIFCLR |= 0X0F400000; in DMA_Reset()
79 DMA1->HIFCLR |= 0x0000003D; in DMA_Reset()
83 DMA1->HIFCLR |= 0X00000F40; in DMA_Reset()
87 DMA1->HIFCLR |= 0x003D0000; in DMA_Reset()
419 dma = DMA1; in DMA_ReadStatusFlag()
472 dma = DMA1; in DMA_ClearStatusFlag()
567 dma = DMA1; in DMA_ReadIntFlag()
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/bsp/airm2m/air32f103/libraries/AIR32F10xLib/src/
A Dair32f10x_dma.c107 DMA1->IFCR |= DMA1_Channel1_IT_Mask; in DMA_DeInit()
112 DMA1->IFCR |= DMA1_Channel2_IT_Mask; in DMA_DeInit()
117 DMA1->IFCR |= DMA1_Channel3_IT_Mask; in DMA_DeInit()
122 DMA1->IFCR |= DMA1_Channel4_IT_Mask; in DMA_DeInit()
127 DMA1->IFCR |= DMA1_Channel5_IT_Mask; in DMA_DeInit()
132 DMA1->IFCR |= DMA1_Channel6_IT_Mask; in DMA_DeInit()
137 DMA1->IFCR |= DMA1_Channel7_IT_Mask; in DMA_DeInit()
426 tmpreg = DMA1->ISR ; in DMA_GetFlagStatus()
513 DMA1->IFCR = DMAy_FLAG; in DMA_ClearFlag()
588 tmpreg = DMA1->ISR; in DMA_GetITStatus()
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/bsp/wch/arm/Libraries/CH32F20x_StdPeriph_Driver/StdPeriph_Driver/src/
A Dch32f20x_dma.c59 DMA1->INTFCR |= DMA1_Channel1_IT_Mask; in DMA_DeInit()
63 DMA1->INTFCR |= DMA1_Channel2_IT_Mask; in DMA_DeInit()
67 DMA1->INTFCR |= DMA1_Channel3_IT_Mask; in DMA_DeInit()
71 DMA1->INTFCR |= DMA1_Channel4_IT_Mask; in DMA_DeInit()
75 DMA1->INTFCR |= DMA1_Channel5_IT_Mask; in DMA_DeInit()
79 DMA1->INTFCR |= DMA1_Channel6_IT_Mask; in DMA_DeInit()
83 DMA1->INTFCR |= DMA1_Channel7_IT_Mask; in DMA_DeInit()
357 tmpreg = DMA1->INTFR ; in DMA_GetFlagStatus()
463 DMA1->INTFCR = DMAy_FLAG; in DMA_ClearFlag()
561 tmpreg = DMA1->INTFR; in DMA_GetITStatus()
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/bsp/ft32/libraries/FT32F0xx/FT32F0xx_Driver/Src/
A Dft32f0xx_dma.c79 DMA1->IFCR |= DMA1_CHANNEL1_IT_MASK; in DMA_DeInit()
84 DMA1->IFCR |= DMA1_CHANNEL2_IT_MASK; in DMA_DeInit()
89 DMA1->IFCR |= DMA1_CHANNEL3_IT_MASK; in DMA_DeInit()
94 DMA1->IFCR |= DMA1_CHANNEL4_IT_MASK; in DMA_DeInit()
99 DMA1->IFCR |= DMA1_CHANNEL5_IT_MASK; in DMA_DeInit()
389 tmpreg = DMA1->ISR ; in DMA_GetFlagStatus()
480 DMA1->IFCR = DMAy_FLAG; in DMA_ClearFlag()
559 tmpreg = DMA1->ISR; in DMA_GetITStatus()
629 DMA1->IFCR = DMAy_IT; in DMA_ClearITPendingBit()
/bsp/mm32f327x/Libraries/MM32F327x/HAL_Lib/Src/
A Dhal_dma.c59 DMA1->IFCR |= (u32)0x0F << (((*(vu32*)&channel & (u32)0xff) - 8) / 5); in DMA_DeInit()
183 return (DMA1->ISR & flag) ? SET : RESET; in DMA_GetFlagStatus()
207 DMA1->IFCR = flag; in DMA_ClearFlag()
230 return (DMA1->ISR & it) ? SET : RESET; in DMA_GetITStatus()
254 DMA1->IFCR = it; in DMA_ClearITPendingBit()
312 DMA1->IFCR |= (u32)0x0F << (((*(vu32*)&channel & (u32)0xff) - 8) / 5); in exDMA_ClearITPendingBit()
313 DMA1->IFCR = it; in exDMA_ClearITPendingBit()
/bsp/rv32m1_vega/rv32m1_sdk_riscv/devices/RV32M1/drivers/
A Dfsl_edma.c458 #elif defined(DMA1) in Get_StartInstance()
459 StartInstanceNum = EDMA_GetInstance(DMA1); in Get_StartInstance()
936 #if defined(DMA1)
941 if ((EDMA_GetChannelStatusFlags(DMA1, 0U) & kEDMA_InterruptFlag) != 0U) in DMA1_04_DriverIRQHandler()
945 if ((EDMA_GetChannelStatusFlags(DMA1, 4U) & kEDMA_InterruptFlag) != 0U) in DMA1_04_DriverIRQHandler()
953 if ((EDMA_GetChannelStatusFlags(DMA1, 1U) & kEDMA_InterruptFlag) != 0U) in DMA1_15_DriverIRQHandler()
957 if ((EDMA_GetChannelStatusFlags(DMA1, 5U) & kEDMA_InterruptFlag) != 0U) in DMA1_15_DriverIRQHandler()
965 if ((EDMA_GetChannelStatusFlags(DMA1, 2U) & kEDMA_InterruptFlag) != 0U) in DMA1_26_DriverIRQHandler()
969 if ((EDMA_GetChannelStatusFlags(DMA1, 6U) & kEDMA_InterruptFlag) != 0U) in DMA1_26_DriverIRQHandler()
977 if ((EDMA_GetChannelStatusFlags(DMA1, 3U) & kEDMA_InterruptFlag) != 0U) in DMA1_37_DriverIRQHandler()
[all …]
/bsp/n32/libraries/N32G4FR_Firmware_Library/n32g4fr_std_periph_driver/src/
A Dn32g4fr_dma.c142 DMA1->INTCLR |= DMA1_CH1_INT_MASK; in DMA_DeInit()
147 DMA1->INTCLR |= DMA1_CH2_INT_MASK; in DMA_DeInit()
152 DMA1->INTCLR |= DMA1_CH3_INT_MASK; in DMA_DeInit()
157 DMA1->INTCLR |= DMA1_CH4_INT_MASK; in DMA_DeInit()
162 DMA1->INTCLR |= DMA1_CH5_INT_MASK; in DMA_DeInit()
167 DMA1->INTCLR |= DMA1_CH6_INT_MASK; in DMA_DeInit()
172 DMA1->INTCLR |= DMA1_CH7_INT_MASK; in DMA_DeInit()
177 DMA1->INTCLR |= DMA1_CH8_INT_MASK; in DMA_DeInit()
/bsp/n32/libraries/N32WB452_Firmware_Library/n32wb452_std_periph_driver/src/
A Dn32wb452_dma.c142 DMA1->INTCLR |= DMA1_CH1_INT_MASK; in DMA_DeInit()
147 DMA1->INTCLR |= DMA1_CH2_INT_MASK; in DMA_DeInit()
152 DMA1->INTCLR |= DMA1_CH3_INT_MASK; in DMA_DeInit()
157 DMA1->INTCLR |= DMA1_CH4_INT_MASK; in DMA_DeInit()
162 DMA1->INTCLR |= DMA1_CH5_INT_MASK; in DMA_DeInit()
167 DMA1->INTCLR |= DMA1_CH6_INT_MASK; in DMA_DeInit()
172 DMA1->INTCLR |= DMA1_CH7_INT_MASK; in DMA_DeInit()
177 DMA1->INTCLR |= DMA1_CH8_INT_MASK; in DMA_DeInit()
/bsp/n32/libraries/N32G45x_Firmware_Library/n32g45x_std_periph_driver/src/
A Dn32g45x_dma.c142 DMA1->INTCLR |= DMA1_CH1_INT_MASK; in DMA_DeInit()
147 DMA1->INTCLR |= DMA1_CH2_INT_MASK; in DMA_DeInit()
152 DMA1->INTCLR |= DMA1_CH3_INT_MASK; in DMA_DeInit()
157 DMA1->INTCLR |= DMA1_CH4_INT_MASK; in DMA_DeInit()
162 DMA1->INTCLR |= DMA1_CH5_INT_MASK; in DMA_DeInit()
167 DMA1->INTCLR |= DMA1_CH6_INT_MASK; in DMA_DeInit()
172 DMA1->INTCLR |= DMA1_CH7_INT_MASK; in DMA_DeInit()
177 DMA1->INTCLR |= DMA1_CH8_INT_MASK; in DMA_DeInit()
/bsp/n32g452xx/Libraries/N32_Std_Driver/n32g45x_std_periph_driver/src/
A Dn32g45x_dma.c142 DMA1->INTCLR |= DMA1_CH1_INT_MASK; in DMA_DeInit()
147 DMA1->INTCLR |= DMA1_CH2_INT_MASK; in DMA_DeInit()
152 DMA1->INTCLR |= DMA1_CH3_INT_MASK; in DMA_DeInit()
157 DMA1->INTCLR |= DMA1_CH4_INT_MASK; in DMA_DeInit()
162 DMA1->INTCLR |= DMA1_CH5_INT_MASK; in DMA_DeInit()
167 DMA1->INTCLR |= DMA1_CH6_INT_MASK; in DMA_DeInit()
172 DMA1->INTCLR |= DMA1_CH7_INT_MASK; in DMA_DeInit()
177 DMA1->INTCLR |= DMA1_CH8_INT_MASK; in DMA_DeInit()
/bsp/frdm-k64f/device/MK64F12/
A Dfsl_edma.c938 #if defined(DMA1)
941 if ((EDMA_GetChannelStatusFlags(DMA1, 0U) & kEDMA_InterruptFlag) != 0U) in DMA1_04_DriverIRQHandler()
945 if ((EDMA_GetChannelStatusFlags(DMA1, 4U) & kEDMA_InterruptFlag) != 0U) in DMA1_04_DriverIRQHandler()
953 if ((EDMA_GetChannelStatusFlags(DMA1, 1U) & kEDMA_InterruptFlag) != 0U) in DMA1_15_DriverIRQHandler()
957 if ((EDMA_GetChannelStatusFlags(DMA1, 5U) & kEDMA_InterruptFlag) != 0U) in DMA1_15_DriverIRQHandler()
965 if ((EDMA_GetChannelStatusFlags(DMA1, 2U) & kEDMA_InterruptFlag) != 0U) in DMA1_26_DriverIRQHandler()
969 if ((EDMA_GetChannelStatusFlags(DMA1, 6U) & kEDMA_InterruptFlag) != 0U) in DMA1_26_DriverIRQHandler()
977 if ((EDMA_GetChannelStatusFlags(DMA1, 3U) & kEDMA_InterruptFlag) != 0U) in DMA1_37_DriverIRQHandler()
981 if ((EDMA_GetChannelStatusFlags(DMA1, 7U) & kEDMA_InterruptFlag) != 0U) in DMA1_37_DriverIRQHandler()
1088 #if defined(DMA1)
[all …]
/bsp/stm32/libraries/STM32L1xx_HAL/STM32L1xx_HAL_Driver/Inc/
A Dstm32l1xx_ll_dma.h35 #if defined (DMA1) || defined (DMA2)
360 (((uint32_t)(__CHANNEL_INSTANCE__) > ((uint32_t)DMA1_Channel7)) ? DMA2 : DMA1)
362 #define __LL_DMA_GET_INSTANCE(__CHANNEL_INSTANCE__) (DMA1)
421 ((((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_D…
423 …(((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_D…
425 …(((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_D…
427 …(((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_D…
429 …(((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_D…
431 …(((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_D…
433 …(((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_D…
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