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Searched refs:DMA1_Channel2_BASE (Results 1 – 25 of 56) sorted by relevance

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/bsp/mm32f327x/Libraries/MM32F327x/Include/
A Dreg_dma.h49 #define DMA1_Channel2_BASE (AHBPERIPH_BASE + 0x001C) ///< Base Address: … macro
89 #define DMA1_ch2 ((DMA_Channel_TypeDef*) DMA1_Channel2_BASE)
95 #define DMA1_Channel2 ((DMA_Channel_TypeDef*) DMA1_Channel2_BASE)
/bsp/mm32l3xx/Libraries/MM32L3xx/HAL_lib/
A DMM32L3xx_lib_version.txt58 #define DMA1_Channel2_BASE (AHBPERIPH_BASE + 0x0058)
67 #define DMA1_Channel2_BASE (AHBPERIPH_BASE + 0x001C)
/bsp/mm32l07x/Libraries/MM32L0xx/HAL_lib/src/
A DHAL_dma.c126 case DMA1_Channel2_BASE: in DMA_DeInit()
/bsp/mm32l3xx/Libraries/MM32L3xx/HAL_lib/src/
A DHAL_dma.c129 case DMA1_Channel2_BASE: in DMA_DeInit()
/bsp/tkm32F499/Libraries/Hal_lib/src/
A DHAL_dma_bak.c130 case DMA1_Channel2_BASE:
/bsp/mm32f103x/Libraries/MM32F103/HAL_lib/src/
A DHAL_dma.c129 case DMA1_Channel2_BASE: in DMA_DeInit()
/bsp/mm32l07x/Libraries/MM32L0xx/HAL_lib/inc/
A DHAL_dma.h69 ((*(uint32_t*)&(PERIPH)) == DMA1_Channel2_BASE) || \
/bsp/mm32l3xx/Libraries/MM32L3xx/HAL_lib/inc/
A DHAL_dma.h69 ((*(uint32_t*)&(PERIPH)) == DMA1_Channel2_BASE) || \
/bsp/mm32f103x/Libraries/MM32F103/HAL_lib/inc/
A DHAL_dma.h69 ((*(uint32_t*)&(PERIPH)) == DMA1_Channel2_BASE) || \
/bsp/tkm32F499/Libraries/Hal_lib/inc/
A DHAL_dma.h69 ((*(uint32_t*)&(PERIPH)) == DMA1_Channel2_BASE) || \
/bsp/stm32/libraries/STM32L1xx_HAL/STM32L1xx_HAL_Driver/Inc/
A Dstm32l1xx_ll_dma.h50 (uint8_t)(DMA1_Channel2_BASE - DMA1_BASE),
/bsp/ft32/libraries/FT32F0xx/CMSIS/FT32F0xx/Include/
A Dft32f030x6.h689 #define DMA1_Channel2_BASE (DMA1_BASE + 0x0000001C) macro
749 #define DMA1_Channel2 ((DMA_Channel_TypeDef *) DMA1_Channel2_BASE)
A Dft32f030x8.h727 #define DMA1_Channel2_BASE (DMA1_BASE + 0x0000001C) macro
788 #define DMA1_Channel2 ((DMA_Channel_TypeDef *) DMA1_Channel2_BASE)
A Dft32f072x8.h736 #define DMA1_Channel2_BASE (DMA1_BASE + 0x0000001C) macro
797 #define DMA1_Channel2 ((DMA_Channel_TypeDef *) DMA1_Channel2_BASE)
A Dft32f032x8.h738 #define DMA1_Channel2_BASE (DMA1_BASE + 0x0000001C) macro
800 #define DMA1_Channel2 ((DMA_Channel_TypeDef *) DMA1_Channel2_BASE)
A Dft32f032x6.h738 #define DMA1_Channel2_BASE (DMA1_BASE + 0x0000001C) macro
800 #define DMA1_Channel2 ((DMA_Channel_TypeDef *) DMA1_Channel2_BASE)
A Dft32f072xb.h787 #define DMA1_Channel2_BASE (DMA1_BASE + 0x0000001C) macro
852 #define DMA1_Channel2 ((DMA_Channel_TypeDef *) DMA1_Channel2_BASE)
/bsp/wch/risc-v/Libraries/CH32V10x_StdPeriph_Driver/CMSIS/WCH/CH32V10x/Include/
A Dch32v10x.h562 #define DMA1_Channel2_BASE (AHBPERIPH_BASE + 0x001C) macro
631 #define DMA1_Channel2 ((DMA_Channel_TypeDef *)DMA1_Channel2_BASE)
/bsp/wch/risc-v/Libraries/CH32V10x_StdPeriph_Driver/StdPeriph_Driver/inc/
A Dch32v10x.h562 #define DMA1_Channel2_BASE (AHBPERIPH_BASE + 0x001C) macro
631 #define DMA1_Channel2 ((DMA_Channel_TypeDef *)DMA1_Channel2_BASE)
/bsp/mm32l3xx/Libraries/MM32L3xx/Include/
A DMM32L3xx.h983 #define DMA1_Channel2_BASE (AHBPERIPH_BASE + 0x001C) macro
1046 #define DMA1_Channel2 ((DMA_Channel_TypeDef *) DMA1_Channel2_BASE)
/bsp/mm32f103x/Libraries/MM32F103/Include/
A DMM32F103.h992 #define DMA1_Channel2_BASE (AHBPERIPH_BASE + 0x001C) macro
1055 #define DMA1_Channel2 ((DMA_Channel_TypeDef *) DMA1_Channel2_BASE)
/bsp/apm32/libraries/APM32S10x_Library/Device/Geehy/APM32S10x/Include/
A Dapm32s10x.h4397 #define DMA1_Channel2_BASE (AHBPERIPH_BASE + 0x001C) macro
4430 #define DMA1_Channel2 ((DMA_Channel_T *) DMA1_Channel2_BASE)
/bsp/tkm32F499/Libraries/CMSIS_and_startup/
A Dtk499.h1232 #define DMA1_Channel2_BASE (AHB1PERIPH_BASE + 0x601C) macro
1364 #define DMA1_Channel2 ((DMA_Channel_TypeDef *) DMA1_Channel2_BASE)
/bsp/mm32l07x/Libraries/MM32L0xx/Include/
A DMM32L0xx.h935 #define DMA1_Channel2_BASE (AHBPERIPH_BASE + 0x001C) macro
989 #define DMA1_Channel2 ((DMA_Channel_TypeDef *) DMA1_Channel2_BASE)
/bsp/hk32/libraries/HK32F0xx_StdPeriph_Driver/CMSIS/HK32F0xx/Include/
A Dhk32f030x4x6x8.h495 #define DMA1_Channel2_BASE (DMA1_BASE + 0x0000001C) macro
548 #define DMA1_Channel2 ((DMA_Channel_TypeDef *) DMA1_Channel2_BASE)

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