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Searched refs:DMA1_Channel7_BASE (Results 1 – 25 of 49) sorted by relevance

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/bsp/mm32f327x/Libraries/MM32F327x/Include/
A Dreg_dma.h55 #define DMA1_Channel7_BASE (AHBPERIPH_BASE + 0x0080) ///< Base Address: … macro
102 #define DMA1_ch7 ((DMA_Channel_TypeDef*) DMA1_Channel7_BASE)
105 #define DMA1_Channel7 ((DMA_Channel_TypeDef*) DMA1_Channel7_BASE)
/bsp/mm32l3xx/Libraries/MM32L3xx/HAL_lib/
A DMM32L3xx_lib_version.txt63 #define DMA1_Channel7_BASE (AHBPERIPH_BASE + 0x0210)
72 #define DMA1_Channel7_BASE (AHBPERIPH_BASE + 0x0080)
/bsp/mm32l3xx/Libraries/MM32L3xx/HAL_lib/src/
A DHAL_dma.c149 case DMA1_Channel7_BASE: in DMA_DeInit()
/bsp/mm32f103x/Libraries/MM32F103/HAL_lib/src/
A DHAL_dma.c149 case DMA1_Channel7_BASE: in DMA_DeInit()
/bsp/mm32l3xx/Libraries/MM32L3xx/HAL_lib/inc/
A DHAL_dma.h74 ((*(uint32_t*)&(PERIPH)) == DMA1_Channel7_BASE))
/bsp/mm32f103x/Libraries/MM32F103/HAL_lib/inc/
A DHAL_dma.h74 ((*(uint32_t*)&(PERIPH)) == DMA1_Channel7_BASE))
/bsp/stm32/libraries/STM32L1xx_HAL/STM32L1xx_HAL_Driver/Inc/
A Dstm32l1xx_ll_dma.h55 (uint8_t)(DMA1_Channel7_BASE - DMA1_BASE)
/bsp/ft32/libraries/FT32F0xx/CMSIS/FT32F0xx/Include/
A Dft32f030x6.h694 #define DMA1_Channel7_BASE (DMA1_BASE + 0x00000080) macro
754 #define DMA1_Channel7 ((DMA_Channel_TypeDef *) DMA1_Channel7_BASE)
A Dft32f030x8.h732 #define DMA1_Channel7_BASE (DMA1_BASE + 0x00000080) macro
793 #define DMA1_Channel7 ((DMA_Channel_TypeDef *) DMA1_Channel7_BASE)
A Dft32f072x8.h741 #define DMA1_Channel7_BASE (DMA1_BASE + 0x00000080) macro
802 #define DMA1_Channel7 ((DMA_Channel_TypeDef *) DMA1_Channel7_BASE)
A Dft32f032x8.h743 #define DMA1_Channel7_BASE (DMA1_BASE + 0x00000080) macro
805 #define DMA1_Channel7 ((DMA_Channel_TypeDef *) DMA1_Channel7_BASE)
A Dft32f032x6.h743 #define DMA1_Channel7_BASE (DMA1_BASE + 0x00000080) macro
805 #define DMA1_Channel7 ((DMA_Channel_TypeDef *) DMA1_Channel7_BASE)
A Dft32f072xb.h792 #define DMA1_Channel7_BASE (DMA1_BASE + 0x00000080) macro
857 #define DMA1_Channel7 ((DMA_Channel_TypeDef *) DMA1_Channel7_BASE)
/bsp/wch/risc-v/Libraries/CH32V10x_StdPeriph_Driver/CMSIS/WCH/CH32V10x/Include/
A Dch32v10x.h567 #define DMA1_Channel7_BASE (AHBPERIPH_BASE + 0x0080) macro
636 #define DMA1_Channel7 ((DMA_Channel_TypeDef *)DMA1_Channel7_BASE)
/bsp/wch/risc-v/Libraries/CH32V10x_StdPeriph_Driver/StdPeriph_Driver/inc/
A Dch32v10x.h567 #define DMA1_Channel7_BASE (AHBPERIPH_BASE + 0x0080) macro
636 #define DMA1_Channel7 ((DMA_Channel_TypeDef *)DMA1_Channel7_BASE)
/bsp/mm32l3xx/Libraries/MM32L3xx/Include/
A DMM32L3xx.h988 #define DMA1_Channel7_BASE (AHBPERIPH_BASE + 0x0080) macro
1051 #define DMA1_Channel7 ((DMA_Channel_TypeDef *) DMA1_Channel7_BASE)
/bsp/mm32f103x/Libraries/MM32F103/Include/
A DMM32F103.h997 #define DMA1_Channel7_BASE (AHBPERIPH_BASE + 0x0080) macro
1060 #define DMA1_Channel7 ((DMA_Channel_TypeDef *) DMA1_Channel7_BASE)
/bsp/apm32/libraries/APM32S10x_Library/Device/Geehy/APM32S10x/Include/
A Dapm32s10x.h4402 #define DMA1_Channel7_BASE (AHBPERIPH_BASE + 0x0080) macro
4435 #define DMA1_Channel7 ((DMA_Channel_T *) DMA1_Channel7_BASE)
/bsp/tkm32F499/Libraries/CMSIS_and_startup/
A Dtk499.h1237 #define DMA1_Channel7_BASE (AHB1PERIPH_BASE + 0x6080) macro
1369 #define DMA1_Channel7 ((DMA_Channel_TypeDef *) DMA1_Channel7_BASE)
/bsp/mm32l07x/Libraries/MM32L0xx/Include/
A DMM32L0xx.h940 #define DMA1_Channel7_BASE (AHBPERIPH_BASE + 0x0080) macro
994 #define DMA1_Channel7 ((DMA_Channel_TypeDef *) DMA1_Channel7_BASE)
/bsp/wch/arm/Libraries/CH32F10x_StdPeriph_Driver/CMSIS/WCH/CH32F10x/Include/
A Dch32f10x.h665 #define DMA1_Channel7_BASE (AHBPERIPH_BASE + 0x0080) macro
736 #define DMA1_Channel7 ((DMA_Channel_TypeDef *) DMA1_Channel7_BASE)
/bsp/wch/arm/Libraries/CH32F10x_StdPeriph_Driver/StdPeriph_Driver/inc/
A Dch32f10x.h665 #define DMA1_Channel7_BASE (AHBPERIPH_BASE + 0x0080) macro
736 #define DMA1_Channel7 ((DMA_Channel_TypeDef *) DMA1_Channel7_BASE)
/bsp/wch/arm/Libraries/CH32F20x_StdPeriph_Driver/CMSIS/WCH/CH32F20x/Include/
A Dch32f20x.h1024 #define DMA1_Channel7_BASE (AHBPERIPH_BASE + 0x0080) macro
1127 #define DMA1_Channel7 ((DMA_Channel_TypeDef *) DMA1_Channel7_BASE)
/bsp/wch/arm/Libraries/CH32F20x_StdPeriph_Driver/StdPeriph_Driver/inc/
A Dch32f20x.h1024 #define DMA1_Channel7_BASE (AHBPERIPH_BASE + 0x0080) macro
1127 #define DMA1_Channel7 ((DMA_Channel_TypeDef *) DMA1_Channel7_BASE)
/bsp/apm32/libraries/APM32E10x_Library/Device/Geehy/APM32E10x/Include/
A Dapm32e10x.h5918 #define DMA1_Channel7_BASE (AHBPERIPH_BASE + 0x0080) macro
5985 #define DMA1_Channel7 ((DMA_Channel_T *) DMA1_Channel7_BASE)

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