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Searched refs:DMA_CCR_DIR_Pos (Results 1 – 25 of 26) sorted by relevance

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/bsp/mm32f327x/Libraries/MM32F327x/Include/
A Dreg_dma.h253 #define DMA_CCR_DIR_Pos (4) macro
254 #define DMA_CCR_DIR (0x01U << DMA_CCR_DIR_Pos) ///< Data transfer …
/bsp/hk32/libraries/HK32F0xx_StdPeriph_Driver/CMSIS/HK32F0xx/Include/
A Dhk32f030x4x6x8.h1146 #define DMA_CCR_DIR_Pos (4U) macro
1147 #define DMA_CCR_DIR_Msk (0x1U << DMA_CCR_DIR_Pos) /*!< 0x00000010 */
A Dhk32f031x4x6.h1124 #define DMA_CCR_DIR_Pos (4U) macro
1125 #define DMA_CCR_DIR_Msk (0x1U << DMA_CCR_DIR_Pos) /*!< 0x00000010 */
A Dhk32f04ax4x6x8.h1192 #define DMA_CCR_DIR_Pos (4U) macro
1193 #define DMA_CCR_DIR_Msk (0x1U << DMA_CCR_DIR_Pos) /*!< 0x00000010 */
/bsp/stm32/libraries/STM32L1xx_HAL/CMSIS/Device/ST/STM32L1xx/Include/
A Dstm32l100xb.h2002 #define DMA_CCR_DIR_Pos (4U) macro
2003 #define DMA_CCR_DIR_Msk (0x1UL << DMA_CCR_DIR_Pos) /*!< 0x00000010 */
A Dstm32l100xba.h2005 #define DMA_CCR_DIR_Pos (4U) macro
2006 #define DMA_CCR_DIR_Msk (0x1UL << DMA_CCR_DIR_Pos) /*!< 0x00000010 */
A Dstm32l151xb.h2003 #define DMA_CCR_DIR_Pos (4U) macro
2004 #define DMA_CCR_DIR_Msk (0x1UL << DMA_CCR_DIR_Pos) /*!< 0x00000010 */
A Dstm32l151xba.h2006 #define DMA_CCR_DIR_Pos (4U) macro
2007 #define DMA_CCR_DIR_Msk (0x1UL << DMA_CCR_DIR_Pos) /*!< 0x00000010 */
A Dstm32l152xb.h2020 #define DMA_CCR_DIR_Pos (4U) macro
2021 #define DMA_CCR_DIR_Msk (0x1UL << DMA_CCR_DIR_Pos) /*!< 0x00000010 */
A Dstm32l152xba.h2008 #define DMA_CCR_DIR_Pos (4U) macro
2009 #define DMA_CCR_DIR_Msk (0x1UL << DMA_CCR_DIR_Pos) /*!< 0x00000010 */
A Dstm32l100xc.h2078 #define DMA_CCR_DIR_Pos (4U) macro
2079 #define DMA_CCR_DIR_Msk (0x1UL << DMA_CCR_DIR_Pos) /*!< 0x00000010 */
A Dstm32l162xdx.h2430 #define DMA_CCR_DIR_Pos (4U) macro
2431 #define DMA_CCR_DIR_Msk (0x1UL << DMA_CCR_DIR_Pos) /*!< 0x00000010 */
A Dstm32l162xe.h2430 #define DMA_CCR_DIR_Pos (4U) macro
2431 #define DMA_CCR_DIR_Msk (0x1UL << DMA_CCR_DIR_Pos) /*!< 0x00000010 */
A Dstm32l152xc.h2240 #define DMA_CCR_DIR_Pos (4U) macro
2241 #define DMA_CCR_DIR_Msk (0x1UL << DMA_CCR_DIR_Pos) /*!< 0x00000010 */
A Dstm32l152xca.h2283 #define DMA_CCR_DIR_Pos (4U) macro
2284 #define DMA_CCR_DIR_Msk (0x1UL << DMA_CCR_DIR_Pos) /*!< 0x00000010 */
A Dstm32l152xe.h2300 #define DMA_CCR_DIR_Pos (4U) macro
2301 #define DMA_CCR_DIR_Msk (0x1UL << DMA_CCR_DIR_Pos) /*!< 0x00000010 */
A Dstm32l162xc.h2370 #define DMA_CCR_DIR_Pos (4U) macro
2371 #define DMA_CCR_DIR_Msk (0x1UL << DMA_CCR_DIR_Pos) /*!< 0x00000010 */
A Dstm32l162xca.h2413 #define DMA_CCR_DIR_Pos (4U) macro
2414 #define DMA_CCR_DIR_Msk (0x1UL << DMA_CCR_DIR_Pos) /*!< 0x00000010 */
A Dstm32l151xca.h2266 #define DMA_CCR_DIR_Pos (4U) macro
2267 #define DMA_CCR_DIR_Msk (0x1UL << DMA_CCR_DIR_Pos) /*!< 0x00000010 */
A Dstm32l151xdx.h2283 #define DMA_CCR_DIR_Pos (4U) macro
2284 #define DMA_CCR_DIR_Msk (0x1UL << DMA_CCR_DIR_Pos) /*!< 0x00000010 */
A Dstm32l151xe.h2283 #define DMA_CCR_DIR_Pos (4U) macro
2284 #define DMA_CCR_DIR_Msk (0x1UL << DMA_CCR_DIR_Pos) /*!< 0x00000010 */
A Dstm32l151xc.h2223 #define DMA_CCR_DIR_Pos (4U) macro
2224 #define DMA_CCR_DIR_Msk (0x1UL << DMA_CCR_DIR_Pos) /*!< 0x00000010 */
A Dstm32l152xdx.h2300 #define DMA_CCR_DIR_Pos (4U) macro
2301 #define DMA_CCR_DIR_Msk (0x1UL << DMA_CCR_DIR_Pos) /*!< 0x00000010 */
A Dstm32l151xd.h2382 #define DMA_CCR_DIR_Pos (4U) macro
2383 #define DMA_CCR_DIR_Msk (0x1UL << DMA_CCR_DIR_Pos) /*!< 0x00000010 */
A Dstm32l152xd.h2399 #define DMA_CCR_DIR_Pos (4U) macro
2400 #define DMA_CCR_DIR_Msk (0x1UL << DMA_CCR_DIR_Pos) /*!< 0x00000010 */

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