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Searched refs:DMA_CCR_PSIZE_0 (Results 1 – 25 of 37) sorted by relevance

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/bsp/mm32f327x/Libraries/MM32F327x/Include/
A Dreg_dma.h264 #define DMA_CCR_PSIZE_0 (0x01U << DMA_CCR_PSIZE_Pos) ///< Bit0 macro
A Dmm32_reg_redefine_v1.h375 #define DMA_CCR1_PSIZE_0 DMA_CCR_PSIZE_0
/bsp/stm32/libraries/STM32L1xx_HAL/STM32L1xx_HAL_Driver/Inc/
A Dstm32l1xx_hal_dma.h193 #define DMA_PDATAALIGN_HALFWORD DMA_CCR_PSIZE_0 /*!< Peripheral data alignment : HalfWord */
A Dstm32l1xx_ll_dma.h290 #define LL_DMA_PDATAALIGN_HALFWORD DMA_CCR_PSIZE_0 /*!< Peripheral data alignment : …
/bsp/hk32/libraries/HK32F0xx_StdPeriph_Driver/inc/
A Dhk32f0xx_dma.h132 #define DMA_PeripheralDataSize_HalfWord DMA_CCR_PSIZE_0
/bsp/ft32/libraries/FT32F0xx/FT32F0xx_Driver/Inc/
A Dft32f0xx_dma.h132 #define DMA_PeripheralDataSize_HalfWord DMA_CCR_PSIZE_0
/bsp/ft32/libraries/FT32F0xx/CMSIS/FT32F0xx/Include/
A Dft32f030x6.h1196 #define DMA_CCR_PSIZE_0 ((uint32_t)0x00000100) /*!< Bit 0 … macro
A Dft32f030x8.h1234 #define DMA_CCR_PSIZE_0 ((uint32_t)0x00000100) /*!< Bit 0 … macro
A Dft32f072x8.h1273 #define DMA_CCR_PSIZE_0 ((uint32_t)0x00000100) /*!< Bit 0 … macro
A Dft32f032x8.h1276 #define DMA_CCR_PSIZE_0 ((uint32_t)0x00000100) /*!< Bit 0 … macro
A Dft32f032x6.h1275 #define DMA_CCR_PSIZE_0 ((uint32_t)0x00000100) /*!< Bit 0 … macro
A Dft32f072xb.h1444 #define DMA_CCR_PSIZE_0 ((uint32_t)0x00000100) /*!< Bit 0 … macro
/bsp/hk32/libraries/HK32F0xx_StdPeriph_Driver/CMSIS/HK32F0xx/Include/
A Dhk32f030x4x6x8.h1162 #define DMA_CCR_PSIZE_0 (0x1U << DMA_CCR_PSIZE_Pos) /*!< 0x00000100 */ macro
A Dhk32f031x4x6.h1140 #define DMA_CCR_PSIZE_0 (0x1U << DMA_CCR_PSIZE_Pos) /*!< 0x00000100 */ macro
A Dhk32f04ax4x6x8.h1208 #define DMA_CCR_PSIZE_0 (0x1U << DMA_CCR_PSIZE_Pos) /*!< 0x00000100 */ macro
/bsp/stm32/libraries/STM32L1xx_HAL/CMSIS/Device/ST/STM32L1xx/Include/
A Dstm32l100xb.h2018 #define DMA_CCR_PSIZE_0 (0x1UL << DMA_CCR_PSIZE_Pos) /*!< 0x00000100 */ macro
A Dstm32l100xba.h2021 #define DMA_CCR_PSIZE_0 (0x1UL << DMA_CCR_PSIZE_Pos) /*!< 0x00000100 */ macro
A Dstm32l151xb.h2019 #define DMA_CCR_PSIZE_0 (0x1UL << DMA_CCR_PSIZE_Pos) /*!< 0x00000100 */ macro
A Dstm32l151xba.h2022 #define DMA_CCR_PSIZE_0 (0x1UL << DMA_CCR_PSIZE_Pos) /*!< 0x00000100 */ macro
A Dstm32l152xb.h2036 #define DMA_CCR_PSIZE_0 (0x1UL << DMA_CCR_PSIZE_Pos) /*!< 0x00000100 */ macro
A Dstm32l152xba.h2024 #define DMA_CCR_PSIZE_0 (0x1UL << DMA_CCR_PSIZE_Pos) /*!< 0x00000100 */ macro
A Dstm32l100xc.h2094 #define DMA_CCR_PSIZE_0 (0x1UL << DMA_CCR_PSIZE_Pos) /*!< 0x00000100 */ macro
A Dstm32l162xdx.h2446 #define DMA_CCR_PSIZE_0 (0x1UL << DMA_CCR_PSIZE_Pos) /*!< 0x00000100 */ macro
A Dstm32l162xe.h2446 #define DMA_CCR_PSIZE_0 (0x1UL << DMA_CCR_PSIZE_Pos) /*!< 0x00000100 */ macro
A Dstm32l152xc.h2256 #define DMA_CCR_PSIZE_0 (0x1UL << DMA_CCR_PSIZE_Pos) /*!< 0x00000100 */ macro

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