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Searched refs:DMA_CTRL (Results 1 – 16 of 16) sorted by relevance

/bsp/raspberry-pi/raspi4-64/drivers/
A Ddrv_eth.c148 tdma_reg = read32(mac_reg_base_addr + TDMA_REG_BASE + DMA_CTRL); in bcmgenet_disable_dma()
150 write32(mac_reg_base_addr + TDMA_REG_BASE + DMA_CTRL, tdma_reg); in bcmgenet_disable_dma()
151 rdma_reg = read32(mac_reg_base_addr + RDMA_REG_BASE + DMA_CTRL); in bcmgenet_disable_dma()
153 write32(mac_reg_base_addr + RDMA_REG_BASE + DMA_CTRL, rdma_reg); in bcmgenet_disable_dma()
165 write32(mac_reg_base_addr + TDMA_REG_BASE + DMA_CTRL, dma_ctrl); in bcmgenet_enable_dma()
167 reg = read32(mac_reg_base_addr + RDMA_REG_BASE + DMA_CTRL); in bcmgenet_enable_dma()
168 write32(mac_reg_base_addr + RDMA_REG_BASE + DMA_CTRL, dma_ctrl | reg); in bcmgenet_enable_dma()
A Ddrv_eth.h170 #define DMA_CTRL (0x04) macro
/bsp/raspberry-pi/raspi4-32/driver/
A Ddrv_eth.c153 tdma_reg = read32(MAC_REG + TDMA_REG_BASE + DMA_CTRL); in bcmgenet_disable_dma()
155 write32(MAC_REG + TDMA_REG_BASE + DMA_CTRL, tdma_reg); in bcmgenet_disable_dma()
156 rdma_reg = read32(MAC_REG + RDMA_REG_BASE + DMA_CTRL); in bcmgenet_disable_dma()
158 write32(MAC_REG + RDMA_REG_BASE + DMA_CTRL, rdma_reg); in bcmgenet_disable_dma()
170 write32(MAC_REG + TDMA_REG_BASE + DMA_CTRL, dma_ctrl); in bcmgenet_enable_dma()
172 reg = read32(MAC_REG + RDMA_REG_BASE + DMA_CTRL); in bcmgenet_enable_dma()
173 write32(MAC_REG + RDMA_REG_BASE + DMA_CTRL, dma_ctrl | reg); in bcmgenet_enable_dma()
A Ddrv_eth.h170 #define DMA_CTRL (0x04) macro
/bsp/n32/libraries/N32G45x_Firmware_Library/n32g45x_std_periph_driver/inc/
A Dn32g45x_qspi.h199 #define IS_QSPI_DMA_CTRL(DMA_CTRL) (((DMA_CTRL) == QSPI_DMA_CTRL_TX_DMA_EN) || ((DMA_CTRL) == QSPI_… argument
/bsp/n32/libraries/N32G4FR_Firmware_Library/n32g4fr_std_periph_driver/inc/
A Dn32g4fr_qspi.h200 #define IS_QSPI_DMA_CTRL(DMA_CTRL) (((DMA_CTRL) == QSPI_DMA_CTRL_TX_DMA_EN) || ((DMA_CTRL) == QSPI_… argument
/bsp/n32g452xx/Libraries/N32_Std_Driver/n32g45x_std_periph_driver/inc/
A Dn32g45x_qspi.h204 #define IS_QSPI_DMA_CTRL(DMA_CTRL) (((DMA_CTRL) == QSPI_DMA_CTRL_TX_DMA_EN) || ((DMA_CTRL) == QSPI_… argument
/bsp/n32/libraries/N32G4FR_Firmware_Library/n32g4fr_std_periph_driver/src/
A Dn32g4fr_qspi.c305 QSPI->DMA_CTRL |= QSPI_DMA_CTRL_TX_DMA_EN; in QSPI_Tx_DMA_CTRL_Config()
309 QSPI->DMA_CTRL &= ~QSPI_DMA_CTRL_TX_DMA_EN; in QSPI_Tx_DMA_CTRL_Config()
327 QSPI->DMA_CTRL |= QSPI_DMA_CTRL_RX_DMA_EN; in QSPI_Rx_DMA_CTRL_Config()
331 QSPI->DMA_CTRL &= ~QSPI_DMA_CTRL_RX_DMA_EN; in QSPI_Rx_DMA_CTRL_Config()
/bsp/n32/libraries/N32G45x_Firmware_Library/n32g45x_std_periph_driver/src/
A Dn32g45x_qspi.c341 QSPI->DMA_CTRL |= QSPI_DMA_CTRL_TX_DMA_EN; in QSPI_Tx_DMA_CTRL_Config()
345 QSPI->DMA_CTRL &= ~QSPI_DMA_CTRL_TX_DMA_EN; in QSPI_Tx_DMA_CTRL_Config()
363 QSPI->DMA_CTRL |= QSPI_DMA_CTRL_RX_DMA_EN; in QSPI_Rx_DMA_CTRL_Config()
367 QSPI->DMA_CTRL &= ~QSPI_DMA_CTRL_RX_DMA_EN; in QSPI_Rx_DMA_CTRL_Config()
/bsp/n32g452xx/Libraries/N32_Std_Driver/n32g45x_std_periph_driver/src/
A Dn32g45x_qspi.c347 QSPI->DMA_CTRL = 0x00; in QSPI_DMA_CTRL_Config()
352 QSPI->DMA_CTRL |= QSPI_DMA_CTRL_TX_DMA_EN; in QSPI_DMA_CTRL_Config()
357 QSPI->DMA_CTRL |= QSPI_DMA_CTRL_RX_DMA_EN; in QSPI_DMA_CTRL_Config()
/bsp/tae32f5300/Libraries/CMSIS/Device/Tai_action/TAE32F53xx/Include/
A Dtae32f53xx.h692 …__IO USB_DMA DMA_CTRL[2]; /*!<Address offset: 0x204~0x223: USB DMA Control Register … member
/bsp/n32/libraries/N32G4FR_Firmware_Library/CMSIS/device/
A Dn32g4fr.h930 __IO uint32_t DMA_CTRL; member
/bsp/n32/libraries/N32G45x_Firmware_Library/CMSIS/device/
A Dn32g45x.h1044 __IO uint32_t DMA_CTRL; member
/bsp/n32g452xx/Libraries/N32_Std_Driver/CMSIS/device/
A Dn32g45x.h1106 __IO uint32_t DMA_CTRL; member
/bsp/rockchip/common/rk_hal/lib/CMSIS/Device/RK2108/Include/
A Drk2108.h702 __IO uint32_t DMA_CTRL; /* Address Offset: 0x0018 */ member
/bsp/rv32m1_vega/rv32m1_sdk_riscv/devices/RV32M1/
A DRV32M1_zero_riscy.h24835 __IO uint32_t DMA_CTRL; /**< TRANSCEIVER DMA CONTROL, offset: 0x14 */ member

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