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Searched refs:DMA_IFCR_CGIF2_Pos (Results 1 – 25 of 26) sorted by relevance

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/bsp/mm32f327x/Libraries/MM32F327x/Include/
A Dreg_dma.h192 #define DMA_IFCR_CGIF2_Pos (4) macro
193 #define DMA_IFCR_CGIF2 (0x01U << DMA_IFCR_CGIF2_Pos) ///< Channel 2 Glob…
/bsp/hk32/libraries/HK32F0xx_StdPeriph_Driver/CMSIS/HK32F0xx/Include/
A Dhk32f030x4x6x8.h1084 #define DMA_IFCR_CGIF2_Pos (4U) macro
1085 #define DMA_IFCR_CGIF2_Msk (0x1U << DMA_IFCR_CGIF2_Pos) /*!< 0x00000010 */
A Dhk32f031x4x6.h1062 #define DMA_IFCR_CGIF2_Pos (4U) macro
1063 #define DMA_IFCR_CGIF2_Msk (0x1U << DMA_IFCR_CGIF2_Pos) /*!< 0x00000010 */
A Dhk32f04ax4x6x8.h1130 #define DMA_IFCR_CGIF2_Pos (4U) macro
1131 #define DMA_IFCR_CGIF2_Msk (0x1U << DMA_IFCR_CGIF2_Pos) /*!< 0x00000010 */
/bsp/stm32/libraries/STM32L1xx_HAL/CMSIS/Device/ST/STM32L1xx/Include/
A Dstm32l100xb.h1916 #define DMA_IFCR_CGIF2_Pos (4U) macro
1917 #define DMA_IFCR_CGIF2_Msk (0x1UL << DMA_IFCR_CGIF2_Pos) /*!< 0x00000010 */
A Dstm32l100xba.h1919 #define DMA_IFCR_CGIF2_Pos (4U) macro
1920 #define DMA_IFCR_CGIF2_Msk (0x1UL << DMA_IFCR_CGIF2_Pos) /*!< 0x00000010 */
A Dstm32l151xb.h1917 #define DMA_IFCR_CGIF2_Pos (4U) macro
1918 #define DMA_IFCR_CGIF2_Msk (0x1UL << DMA_IFCR_CGIF2_Pos) /*!< 0x00000010 */
A Dstm32l151xba.h1920 #define DMA_IFCR_CGIF2_Pos (4U) macro
1921 #define DMA_IFCR_CGIF2_Msk (0x1UL << DMA_IFCR_CGIF2_Pos) /*!< 0x00000010 */
A Dstm32l152xb.h1934 #define DMA_IFCR_CGIF2_Pos (4U) macro
1935 #define DMA_IFCR_CGIF2_Msk (0x1UL << DMA_IFCR_CGIF2_Pos) /*!< 0x00000010 */
A Dstm32l152xba.h1922 #define DMA_IFCR_CGIF2_Pos (4U) macro
1923 #define DMA_IFCR_CGIF2_Msk (0x1UL << DMA_IFCR_CGIF2_Pos) /*!< 0x00000010 */
A Dstm32l100xc.h1992 #define DMA_IFCR_CGIF2_Pos (4U) macro
1993 #define DMA_IFCR_CGIF2_Msk (0x1UL << DMA_IFCR_CGIF2_Pos) /*!< 0x00000010 */
A Dstm32l162xdx.h2344 #define DMA_IFCR_CGIF2_Pos (4U) macro
2345 #define DMA_IFCR_CGIF2_Msk (0x1UL << DMA_IFCR_CGIF2_Pos) /*!< 0x00000010 */
A Dstm32l162xe.h2344 #define DMA_IFCR_CGIF2_Pos (4U) macro
2345 #define DMA_IFCR_CGIF2_Msk (0x1UL << DMA_IFCR_CGIF2_Pos) /*!< 0x00000010 */
A Dstm32l152xc.h2154 #define DMA_IFCR_CGIF2_Pos (4U) macro
2155 #define DMA_IFCR_CGIF2_Msk (0x1UL << DMA_IFCR_CGIF2_Pos) /*!< 0x00000010 */
A Dstm32l152xca.h2197 #define DMA_IFCR_CGIF2_Pos (4U) macro
2198 #define DMA_IFCR_CGIF2_Msk (0x1UL << DMA_IFCR_CGIF2_Pos) /*!< 0x00000010 */
A Dstm32l152xe.h2214 #define DMA_IFCR_CGIF2_Pos (4U) macro
2215 #define DMA_IFCR_CGIF2_Msk (0x1UL << DMA_IFCR_CGIF2_Pos) /*!< 0x00000010 */
A Dstm32l162xc.h2284 #define DMA_IFCR_CGIF2_Pos (4U) macro
2285 #define DMA_IFCR_CGIF2_Msk (0x1UL << DMA_IFCR_CGIF2_Pos) /*!< 0x00000010 */
A Dstm32l162xca.h2327 #define DMA_IFCR_CGIF2_Pos (4U) macro
2328 #define DMA_IFCR_CGIF2_Msk (0x1UL << DMA_IFCR_CGIF2_Pos) /*!< 0x00000010 */
A Dstm32l151xca.h2180 #define DMA_IFCR_CGIF2_Pos (4U) macro
2181 #define DMA_IFCR_CGIF2_Msk (0x1UL << DMA_IFCR_CGIF2_Pos) /*!< 0x00000010 */
A Dstm32l151xdx.h2197 #define DMA_IFCR_CGIF2_Pos (4U) macro
2198 #define DMA_IFCR_CGIF2_Msk (0x1UL << DMA_IFCR_CGIF2_Pos) /*!< 0x00000010 */
A Dstm32l151xe.h2197 #define DMA_IFCR_CGIF2_Pos (4U) macro
2198 #define DMA_IFCR_CGIF2_Msk (0x1UL << DMA_IFCR_CGIF2_Pos) /*!< 0x00000010 */
A Dstm32l151xc.h2137 #define DMA_IFCR_CGIF2_Pos (4U) macro
2138 #define DMA_IFCR_CGIF2_Msk (0x1UL << DMA_IFCR_CGIF2_Pos) /*!< 0x00000010 */
A Dstm32l152xdx.h2214 #define DMA_IFCR_CGIF2_Pos (4U) macro
2215 #define DMA_IFCR_CGIF2_Msk (0x1UL << DMA_IFCR_CGIF2_Pos) /*!< 0x00000010 */
A Dstm32l151xd.h2296 #define DMA_IFCR_CGIF2_Pos (4U) macro
2297 #define DMA_IFCR_CGIF2_Msk (0x1UL << DMA_IFCR_CGIF2_Pos) /*!< 0x00000010 */
A Dstm32l152xd.h2313 #define DMA_IFCR_CGIF2_Pos (4U) macro
2314 #define DMA_IFCR_CGIF2_Msk (0x1UL << DMA_IFCR_CGIF2_Pos) /*!< 0x00000010 */

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