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Searched refs:DMA_IFCR_CTCIF4_Pos (Results 1 – 25 of 26) sorted by relevance

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/bsp/mm32f327x/Libraries/MM32F327x/Include/
A Dreg_dma.h210 #define DMA_IFCR_CTCIF4_Pos (13) macro
211 #define DMA_IFCR_CTCIF4 (0x01U << DMA_IFCR_CTCIF4_Pos) ///< Channel 4 Tran…
/bsp/hk32/libraries/HK32F0xx_StdPeriph_Driver/CMSIS/HK32F0xx/Include/
A Dhk32f030x4x6x8.h1111 #define DMA_IFCR_CTCIF4_Pos (13U) macro
1112 #define DMA_IFCR_CTCIF4_Msk (0x1U << DMA_IFCR_CTCIF4_Pos) /*!< 0x00002000 */
A Dhk32f031x4x6.h1089 #define DMA_IFCR_CTCIF4_Pos (13U) macro
1090 #define DMA_IFCR_CTCIF4_Msk (0x1U << DMA_IFCR_CTCIF4_Pos) /*!< 0x00002000 */
A Dhk32f04ax4x6x8.h1157 #define DMA_IFCR_CTCIF4_Pos (13U) macro
1158 #define DMA_IFCR_CTCIF4_Msk (0x1U << DMA_IFCR_CTCIF4_Pos) /*!< 0x00002000 */
/bsp/stm32/libraries/STM32L1xx_HAL/CMSIS/Device/ST/STM32L1xx/Include/
A Dstm32l100xb.h1943 #define DMA_IFCR_CTCIF4_Pos (13U) macro
1944 #define DMA_IFCR_CTCIF4_Msk (0x1UL << DMA_IFCR_CTCIF4_Pos) /*!< 0x00002000 */
A Dstm32l100xba.h1946 #define DMA_IFCR_CTCIF4_Pos (13U) macro
1947 #define DMA_IFCR_CTCIF4_Msk (0x1UL << DMA_IFCR_CTCIF4_Pos) /*!< 0x00002000 */
A Dstm32l151xb.h1944 #define DMA_IFCR_CTCIF4_Pos (13U) macro
1945 #define DMA_IFCR_CTCIF4_Msk (0x1UL << DMA_IFCR_CTCIF4_Pos) /*!< 0x00002000 */
A Dstm32l151xba.h1947 #define DMA_IFCR_CTCIF4_Pos (13U) macro
1948 #define DMA_IFCR_CTCIF4_Msk (0x1UL << DMA_IFCR_CTCIF4_Pos) /*!< 0x00002000 */
A Dstm32l152xb.h1961 #define DMA_IFCR_CTCIF4_Pos (13U) macro
1962 #define DMA_IFCR_CTCIF4_Msk (0x1UL << DMA_IFCR_CTCIF4_Pos) /*!< 0x00002000 */
A Dstm32l152xba.h1949 #define DMA_IFCR_CTCIF4_Pos (13U) macro
1950 #define DMA_IFCR_CTCIF4_Msk (0x1UL << DMA_IFCR_CTCIF4_Pos) /*!< 0x00002000 */
A Dstm32l100xc.h2019 #define DMA_IFCR_CTCIF4_Pos (13U) macro
2020 #define DMA_IFCR_CTCIF4_Msk (0x1UL << DMA_IFCR_CTCIF4_Pos) /*!< 0x00002000 */
A Dstm32l162xdx.h2371 #define DMA_IFCR_CTCIF4_Pos (13U) macro
2372 #define DMA_IFCR_CTCIF4_Msk (0x1UL << DMA_IFCR_CTCIF4_Pos) /*!< 0x00002000 */
A Dstm32l162xe.h2371 #define DMA_IFCR_CTCIF4_Pos (13U) macro
2372 #define DMA_IFCR_CTCIF4_Msk (0x1UL << DMA_IFCR_CTCIF4_Pos) /*!< 0x00002000 */
A Dstm32l152xc.h2181 #define DMA_IFCR_CTCIF4_Pos (13U) macro
2182 #define DMA_IFCR_CTCIF4_Msk (0x1UL << DMA_IFCR_CTCIF4_Pos) /*!< 0x00002000 */
A Dstm32l152xca.h2224 #define DMA_IFCR_CTCIF4_Pos (13U) macro
2225 #define DMA_IFCR_CTCIF4_Msk (0x1UL << DMA_IFCR_CTCIF4_Pos) /*!< 0x00002000 */
A Dstm32l152xe.h2241 #define DMA_IFCR_CTCIF4_Pos (13U) macro
2242 #define DMA_IFCR_CTCIF4_Msk (0x1UL << DMA_IFCR_CTCIF4_Pos) /*!< 0x00002000 */
A Dstm32l162xc.h2311 #define DMA_IFCR_CTCIF4_Pos (13U) macro
2312 #define DMA_IFCR_CTCIF4_Msk (0x1UL << DMA_IFCR_CTCIF4_Pos) /*!< 0x00002000 */
A Dstm32l162xca.h2354 #define DMA_IFCR_CTCIF4_Pos (13U) macro
2355 #define DMA_IFCR_CTCIF4_Msk (0x1UL << DMA_IFCR_CTCIF4_Pos) /*!< 0x00002000 */
A Dstm32l151xca.h2207 #define DMA_IFCR_CTCIF4_Pos (13U) macro
2208 #define DMA_IFCR_CTCIF4_Msk (0x1UL << DMA_IFCR_CTCIF4_Pos) /*!< 0x00002000 */
A Dstm32l151xdx.h2224 #define DMA_IFCR_CTCIF4_Pos (13U) macro
2225 #define DMA_IFCR_CTCIF4_Msk (0x1UL << DMA_IFCR_CTCIF4_Pos) /*!< 0x00002000 */
A Dstm32l151xe.h2224 #define DMA_IFCR_CTCIF4_Pos (13U) macro
2225 #define DMA_IFCR_CTCIF4_Msk (0x1UL << DMA_IFCR_CTCIF4_Pos) /*!< 0x00002000 */
A Dstm32l151xc.h2164 #define DMA_IFCR_CTCIF4_Pos (13U) macro
2165 #define DMA_IFCR_CTCIF4_Msk (0x1UL << DMA_IFCR_CTCIF4_Pos) /*!< 0x00002000 */
A Dstm32l152xdx.h2241 #define DMA_IFCR_CTCIF4_Pos (13U) macro
2242 #define DMA_IFCR_CTCIF4_Msk (0x1UL << DMA_IFCR_CTCIF4_Pos) /*!< 0x00002000 */
A Dstm32l151xd.h2323 #define DMA_IFCR_CTCIF4_Pos (13U) macro
2324 #define DMA_IFCR_CTCIF4_Msk (0x1UL << DMA_IFCR_CTCIF4_Pos) /*!< 0x00002000 */
A Dstm32l152xd.h2340 #define DMA_IFCR_CTCIF4_Pos (13U) macro
2341 #define DMA_IFCR_CTCIF4_Msk (0x1UL << DMA_IFCR_CTCIF4_Pos) /*!< 0x00002000 */

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