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Searched refs:DMA_IFCR_CTEIF4_Pos (Results 1 – 25 of 26) sorted by relevance

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/bsp/mm32f327x/Libraries/MM32F327x/Include/
A Dreg_dma.h214 #define DMA_IFCR_CTEIF4_Pos (15) macro
215 #define DMA_IFCR_CTEIF4 (0x01U << DMA_IFCR_CTEIF4_Pos) ///< Channel 4 Tran…
/bsp/hk32/libraries/HK32F0xx_StdPeriph_Driver/CMSIS/HK32F0xx/Include/
A Dhk32f030x4x6x8.h1117 #define DMA_IFCR_CTEIF4_Pos (15U) macro
1118 #define DMA_IFCR_CTEIF4_Msk (0x1U << DMA_IFCR_CTEIF4_Pos) /*!< 0x00008000 */
A Dhk32f031x4x6.h1095 #define DMA_IFCR_CTEIF4_Pos (15U) macro
1096 #define DMA_IFCR_CTEIF4_Msk (0x1U << DMA_IFCR_CTEIF4_Pos) /*!< 0x00008000 */
A Dhk32f04ax4x6x8.h1163 #define DMA_IFCR_CTEIF4_Pos (15U) macro
1164 #define DMA_IFCR_CTEIF4_Msk (0x1U << DMA_IFCR_CTEIF4_Pos) /*!< 0x00008000 */
/bsp/stm32/libraries/STM32L1xx_HAL/CMSIS/Device/ST/STM32L1xx/Include/
A Dstm32l100xb.h1949 #define DMA_IFCR_CTEIF4_Pos (15U) macro
1950 #define DMA_IFCR_CTEIF4_Msk (0x1UL << DMA_IFCR_CTEIF4_Pos) /*!< 0x00008000 */
A Dstm32l100xba.h1952 #define DMA_IFCR_CTEIF4_Pos (15U) macro
1953 #define DMA_IFCR_CTEIF4_Msk (0x1UL << DMA_IFCR_CTEIF4_Pos) /*!< 0x00008000 */
A Dstm32l151xb.h1950 #define DMA_IFCR_CTEIF4_Pos (15U) macro
1951 #define DMA_IFCR_CTEIF4_Msk (0x1UL << DMA_IFCR_CTEIF4_Pos) /*!< 0x00008000 */
A Dstm32l151xba.h1953 #define DMA_IFCR_CTEIF4_Pos (15U) macro
1954 #define DMA_IFCR_CTEIF4_Msk (0x1UL << DMA_IFCR_CTEIF4_Pos) /*!< 0x00008000 */
A Dstm32l152xb.h1967 #define DMA_IFCR_CTEIF4_Pos (15U) macro
1968 #define DMA_IFCR_CTEIF4_Msk (0x1UL << DMA_IFCR_CTEIF4_Pos) /*!< 0x00008000 */
A Dstm32l152xba.h1955 #define DMA_IFCR_CTEIF4_Pos (15U) macro
1956 #define DMA_IFCR_CTEIF4_Msk (0x1UL << DMA_IFCR_CTEIF4_Pos) /*!< 0x00008000 */
A Dstm32l100xc.h2025 #define DMA_IFCR_CTEIF4_Pos (15U) macro
2026 #define DMA_IFCR_CTEIF4_Msk (0x1UL << DMA_IFCR_CTEIF4_Pos) /*!< 0x00008000 */
A Dstm32l162xdx.h2377 #define DMA_IFCR_CTEIF4_Pos (15U) macro
2378 #define DMA_IFCR_CTEIF4_Msk (0x1UL << DMA_IFCR_CTEIF4_Pos) /*!< 0x00008000 */
A Dstm32l162xe.h2377 #define DMA_IFCR_CTEIF4_Pos (15U) macro
2378 #define DMA_IFCR_CTEIF4_Msk (0x1UL << DMA_IFCR_CTEIF4_Pos) /*!< 0x00008000 */
A Dstm32l152xc.h2187 #define DMA_IFCR_CTEIF4_Pos (15U) macro
2188 #define DMA_IFCR_CTEIF4_Msk (0x1UL << DMA_IFCR_CTEIF4_Pos) /*!< 0x00008000 */
A Dstm32l152xca.h2230 #define DMA_IFCR_CTEIF4_Pos (15U) macro
2231 #define DMA_IFCR_CTEIF4_Msk (0x1UL << DMA_IFCR_CTEIF4_Pos) /*!< 0x00008000 */
A Dstm32l152xe.h2247 #define DMA_IFCR_CTEIF4_Pos (15U) macro
2248 #define DMA_IFCR_CTEIF4_Msk (0x1UL << DMA_IFCR_CTEIF4_Pos) /*!< 0x00008000 */
A Dstm32l162xc.h2317 #define DMA_IFCR_CTEIF4_Pos (15U) macro
2318 #define DMA_IFCR_CTEIF4_Msk (0x1UL << DMA_IFCR_CTEIF4_Pos) /*!< 0x00008000 */
A Dstm32l162xca.h2360 #define DMA_IFCR_CTEIF4_Pos (15U) macro
2361 #define DMA_IFCR_CTEIF4_Msk (0x1UL << DMA_IFCR_CTEIF4_Pos) /*!< 0x00008000 */
A Dstm32l151xca.h2213 #define DMA_IFCR_CTEIF4_Pos (15U) macro
2214 #define DMA_IFCR_CTEIF4_Msk (0x1UL << DMA_IFCR_CTEIF4_Pos) /*!< 0x00008000 */
A Dstm32l151xdx.h2230 #define DMA_IFCR_CTEIF4_Pos (15U) macro
2231 #define DMA_IFCR_CTEIF4_Msk (0x1UL << DMA_IFCR_CTEIF4_Pos) /*!< 0x00008000 */
A Dstm32l151xe.h2230 #define DMA_IFCR_CTEIF4_Pos (15U) macro
2231 #define DMA_IFCR_CTEIF4_Msk (0x1UL << DMA_IFCR_CTEIF4_Pos) /*!< 0x00008000 */
A Dstm32l151xc.h2170 #define DMA_IFCR_CTEIF4_Pos (15U) macro
2171 #define DMA_IFCR_CTEIF4_Msk (0x1UL << DMA_IFCR_CTEIF4_Pos) /*!< 0x00008000 */
A Dstm32l152xdx.h2247 #define DMA_IFCR_CTEIF4_Pos (15U) macro
2248 #define DMA_IFCR_CTEIF4_Msk (0x1UL << DMA_IFCR_CTEIF4_Pos) /*!< 0x00008000 */
A Dstm32l151xd.h2329 #define DMA_IFCR_CTEIF4_Pos (15U) macro
2330 #define DMA_IFCR_CTEIF4_Msk (0x1UL << DMA_IFCR_CTEIF4_Pos) /*!< 0x00008000 */
A Dstm32l152xd.h2346 #define DMA_IFCR_CTEIF4_Pos (15U) macro
2347 #define DMA_IFCR_CTEIF4_Msk (0x1UL << DMA_IFCR_CTEIF4_Pos) /*!< 0x00008000 */

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