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Searched refs:DMA_ISR_TEIF1_Pos (Results 1 – 25 of 26) sorted by relevance

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/bsp/mm32f327x/Libraries/MM32F327x/Include/
A Dreg_dma.h129 #define DMA_ISR_TEIF1_Pos (3) macro
130 #define DMA_ISR_TEIF1 (0x01U << DMA_ISR_TEIF1_Pos) ///< Channel 1 Tran…
/bsp/hk32/libraries/HK32F0xx_StdPeriph_Driver/CMSIS/HK32F0xx/Include/
A Dhk32f030x4x6x8.h1019 #define DMA_ISR_TEIF1_Pos (3U) macro
1020 #define DMA_ISR_TEIF1_Msk (0x1U << DMA_ISR_TEIF1_Pos) /*!< 0x00000008 */
A Dhk32f031x4x6.h997 #define DMA_ISR_TEIF1_Pos (3U) macro
998 #define DMA_ISR_TEIF1_Msk (0x1U << DMA_ISR_TEIF1_Pos) /*!< 0x00000008 */
A Dhk32f04ax4x6x8.h1065 #define DMA_ISR_TEIF1_Pos (3U) macro
1066 #define DMA_ISR_TEIF1_Msk (0x1U << DMA_ISR_TEIF1_Pos) /*!< 0x00000008 */
/bsp/stm32/libraries/STM32L1xx_HAL/CMSIS/Device/ST/STM32L1xx/Include/
A Dstm32l100xb.h1827 #define DMA_ISR_TEIF1_Pos (3U) macro
1828 #define DMA_ISR_TEIF1_Msk (0x1UL << DMA_ISR_TEIF1_Pos) /*!< 0x00000008 */
A Dstm32l100xba.h1830 #define DMA_ISR_TEIF1_Pos (3U) macro
1831 #define DMA_ISR_TEIF1_Msk (0x1UL << DMA_ISR_TEIF1_Pos) /*!< 0x00000008 */
A Dstm32l151xb.h1828 #define DMA_ISR_TEIF1_Pos (3U) macro
1829 #define DMA_ISR_TEIF1_Msk (0x1UL << DMA_ISR_TEIF1_Pos) /*!< 0x00000008 */
A Dstm32l151xba.h1831 #define DMA_ISR_TEIF1_Pos (3U) macro
1832 #define DMA_ISR_TEIF1_Msk (0x1UL << DMA_ISR_TEIF1_Pos) /*!< 0x00000008 */
A Dstm32l152xb.h1845 #define DMA_ISR_TEIF1_Pos (3U) macro
1846 #define DMA_ISR_TEIF1_Msk (0x1UL << DMA_ISR_TEIF1_Pos) /*!< 0x00000008 */
A Dstm32l152xba.h1833 #define DMA_ISR_TEIF1_Pos (3U) macro
1834 #define DMA_ISR_TEIF1_Msk (0x1UL << DMA_ISR_TEIF1_Pos) /*!< 0x00000008 */
A Dstm32l100xc.h1903 #define DMA_ISR_TEIF1_Pos (3U) macro
1904 #define DMA_ISR_TEIF1_Msk (0x1UL << DMA_ISR_TEIF1_Pos) /*!< 0x00000008 */
A Dstm32l162xdx.h2255 #define DMA_ISR_TEIF1_Pos (3U) macro
2256 #define DMA_ISR_TEIF1_Msk (0x1UL << DMA_ISR_TEIF1_Pos) /*!< 0x00000008 */
A Dstm32l162xe.h2255 #define DMA_ISR_TEIF1_Pos (3U) macro
2256 #define DMA_ISR_TEIF1_Msk (0x1UL << DMA_ISR_TEIF1_Pos) /*!< 0x00000008 */
A Dstm32l152xc.h2065 #define DMA_ISR_TEIF1_Pos (3U) macro
2066 #define DMA_ISR_TEIF1_Msk (0x1UL << DMA_ISR_TEIF1_Pos) /*!< 0x00000008 */
A Dstm32l152xca.h2108 #define DMA_ISR_TEIF1_Pos (3U) macro
2109 #define DMA_ISR_TEIF1_Msk (0x1UL << DMA_ISR_TEIF1_Pos) /*!< 0x00000008 */
A Dstm32l152xe.h2125 #define DMA_ISR_TEIF1_Pos (3U) macro
2126 #define DMA_ISR_TEIF1_Msk (0x1UL << DMA_ISR_TEIF1_Pos) /*!< 0x00000008 */
A Dstm32l162xc.h2195 #define DMA_ISR_TEIF1_Pos (3U) macro
2196 #define DMA_ISR_TEIF1_Msk (0x1UL << DMA_ISR_TEIF1_Pos) /*!< 0x00000008 */
A Dstm32l162xca.h2238 #define DMA_ISR_TEIF1_Pos (3U) macro
2239 #define DMA_ISR_TEIF1_Msk (0x1UL << DMA_ISR_TEIF1_Pos) /*!< 0x00000008 */
A Dstm32l151xca.h2091 #define DMA_ISR_TEIF1_Pos (3U) macro
2092 #define DMA_ISR_TEIF1_Msk (0x1UL << DMA_ISR_TEIF1_Pos) /*!< 0x00000008 */
A Dstm32l151xdx.h2108 #define DMA_ISR_TEIF1_Pos (3U) macro
2109 #define DMA_ISR_TEIF1_Msk (0x1UL << DMA_ISR_TEIF1_Pos) /*!< 0x00000008 */
A Dstm32l151xe.h2108 #define DMA_ISR_TEIF1_Pos (3U) macro
2109 #define DMA_ISR_TEIF1_Msk (0x1UL << DMA_ISR_TEIF1_Pos) /*!< 0x00000008 */
A Dstm32l151xc.h2048 #define DMA_ISR_TEIF1_Pos (3U) macro
2049 #define DMA_ISR_TEIF1_Msk (0x1UL << DMA_ISR_TEIF1_Pos) /*!< 0x00000008 */
A Dstm32l152xdx.h2125 #define DMA_ISR_TEIF1_Pos (3U) macro
2126 #define DMA_ISR_TEIF1_Msk (0x1UL << DMA_ISR_TEIF1_Pos) /*!< 0x00000008 */
A Dstm32l151xd.h2207 #define DMA_ISR_TEIF1_Pos (3U) macro
2208 #define DMA_ISR_TEIF1_Msk (0x1UL << DMA_ISR_TEIF1_Pos) /*!< 0x00000008 */
A Dstm32l152xd.h2224 #define DMA_ISR_TEIF1_Pos (3U) macro
2225 #define DMA_ISR_TEIF1_Msk (0x1UL << DMA_ISR_TEIF1_Pos) /*!< 0x00000008 */

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