1 /* 2 * Copyright 2021 MindMotion Microelectronics Co., Ltd. 3 * All rights reserved. 4 * 5 * SPDX-License-Identifier: BSD-3-Clause 6 */ 7 8 #ifndef __HAL_DMA_H__ 9 #define __HAL_DMA_H__ 10 11 #include "hal_common.h" 12 13 /*! 14 * @addtogroup DMA 15 * @{ 16 */ 17 18 /*! 19 * @addtogroup DMA_CHANNEL_INT 20 * @{ 21 */ 22 #define DMA_CHN_INT_XFER_GLOBAL (0x1u << 0u) /*!< DMA global interrupt channel. */ 23 #define DMA_CHN_INT_XFER_DONE (0x1u << 1u) /*!< DMA end of transfer interrupt channel. */ 24 #define DMA_CHN_INT_XFER_HALF_DONE (0x1u << 2u) /*!< DMA half transfer interrupt channel. */ 25 #define DMA_CHN_INT_XFER_ERR (0x1u << 3u) /*!< DMA transfer error interrupt channel. */ 26 /*! 27 * @} 28 */ 29 30 31 /*! 32 * @brief Define the enum type of DMA_XferMode_Type. 33 */ 34 typedef enum 35 { 36 DMA_XferMode_PeriphToMemory = 0u, /*!< memory to memory mode, from periph addr to memory addr. */ 37 DMA_XferMode_MemoryToPeriph = 1u, /*!< memory to memory mode, from periph addr to memory addr. */ 38 DMA_XferMode_PeriphToMemoryBurst = 2u, /*!< memory to memory mode, from periph addr to memory addr. */ 39 DMA_XferMode_MemoryToPeriphBurst = 3u, /*!< memory to memory mode, from memory addr to periph addr. */ 40 } DMA_XferMode_Type; 41 42 /*! 43 * @brief Define the enum type of DMA_ReloadMode_Type. 44 */ 45 typedef enum 46 { 47 DMA_ReloadMode_OneTime = 0u, /*!< the count is exhausted after the xfer is done. */ 48 DMA_ReloadMode_AutoReload = 1u, /*!< auto reload the count for the new xfer. */ 49 DMA_ReloadMode_AutoReloadContinuous = 2u, /*!< auto reload the count for the next xfer, and always run. */ 50 } DMA_ReloadMode_Type; 51 52 /*! 53 * @brief Incremental mode of peripherals and memories. 54 */ 55 typedef enum 56 { 57 DMA_AddrIncMode_StayAfterXfer = 0u, /*!< Peripheral access address accumulation. */ 58 DMA_AddrIncMode_IncAfterXfer = 1u, /*!< Memory access address accumulation. */ 59 } DMA_AddrIncMode_Type; 60 61 /*! 62 * @brief Define the enum type of DMA xfer width type. 63 */ 64 typedef enum 65 { 66 DMA_XferWidth_8b = 0u, /*!< Xfer width 8 bits. */ 67 DMA_XferWidth_16b = 1u, /*!< Xfer width 16 bits. */ 68 DMA_XferWidth_32b = 2u, /*!< Xfer width 32 bits. */ 69 } DMA_XferWidth_Type; 70 71 /*! 72 * @brief Configure DMA Priority. 73 */ 74 typedef enum 75 { 76 DMA_Priority_Low = 0u, /*!< Low Priority. */ 77 DMA_Priority_Middle = 1u, /*!< Middle Priority. */ 78 DMA_Priority_High = 2u, /*!< High Priority. */ 79 DMA_Priority_Highest = 3u, /*!< Highest Priority. */ 80 } DMA_Priority_Type; 81 82 /*! 83 * @brief This type of structure instance is used to keep the settings when calling the @ref DMA_InitChannel() to initialize the DMA module. 84 */ 85 typedef struct 86 { 87 DMA_XferMode_Type XferMode; /*!< Specify whether the Receive or Transmit mode is enabled or not. */ 88 DMA_ReloadMode_Type ReloadMode; /*!< Specify whether to automatically reload the next transfer count when the count is exhausted. */ 89 DMA_AddrIncMode_Type PeriphAddrIncMode; /*!< Specify peripheral Address Inc Mode. */ 90 DMA_AddrIncMode_Type MemAddrIncMode; /*!< Specify Memory Address Inc Mode. */ 91 DMA_XferWidth_Type XferWidth; /*!< Specify the transmission data width. */ 92 DMA_Priority_Type Priority; /*!< Specify priority mode. */ 93 uint32_t XferCount; /*!< Specify CircularMode's count. */ 94 uint32_t MemAddr; /*!< Specify Memory Address. */ 95 uint32_t PeriphAddr; /*!< Specify Periph Address. */ 96 } DMA_Channel_Init_Type; 97 98 /*! 99 * @brief Initialize the DMA module. 100 * 101 * @param DMAx DMA instance. 102 * @param channel Channel corresponding to DMA controller. 103 * @param init Pointer to the initialization structure. See to @ref DMA_Channel_Init_Type. 104 * @return None. 105 */ 106 uint32_t DMA_InitChannel(DMA_Type * DMAx, uint32_t channel, DMA_Channel_Init_Type * init); 107 108 /*! 109 * @brief enable the DMA channel interrupts of the DMA module. 110 * 111 * @param DMAx DMA instance. 112 * @param channel Channel corresponding to DMA controller. 113 * @param interrupts Interrupt code masks. See to @ref DMA_CHANNEL_INT. 114 * @param enable 'true' to enable the DMA channel interrupts, 'false' to disable the DMA channel interrupts. 115 * @return None. 116 */ 117 void DMA_EnableChannelInterrupts(DMA_Type * DMAx, uint32_t channel, uint32_t interrupts, bool enable); 118 119 /*! 120 * @brief Get the channel interrupts status flags of the DMA module. 121 * 122 * @param DMAx DMA instance. 123 * @param channel Channel corresponding to DMA controller in DMA. See to @ref DMA_CHANNEL_INT. 124 * @return Interrupt status flags. 125 */ 126 uint32_t DMA_GetChannelInterruptStatus(DMA_Type * DMAx, uint32_t channel); 127 128 /*! 129 * @brief Clear the channel interrupts status flags of the DMA module. 130 * 131 * @param DMAx DMA instance. 132 * @param channel Channel corresponding to DMA controller. See to @ref DMA_CHANNEL_INT. 133 * @param interrupts Interrupt code masks. 134 * @return None. 135 */ 136 void DMA_ClearChannelInterruptStatus(DMA_Type * DMAx, uint32_t channel, uint32_t interrupts); 137 138 /*! 139 * @brief Enable the channel of the DMA module. 140 * 141 * @param DMAx DMA instance. 142 * @param channel Channel corresponding to DMA controller. See to @ref DMA_CHANNEL_INT. 143 * @param enable 'true' to enable the DMA controller sends a reply signal to the peripheral, 'false' to disable the DMA controller sends a reply signal to the peripheral. 144 * @return None. 145 */ 146 void DMA_EnableChannel(DMA_Type * DMAx, uint32_t channel, bool enable); 147 148 /*! 149 *@} 150 */ 151 152 #endif /* __HAL_DMA_H__ */ 153 154