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Searched refs:DMA_START (Results 1 – 3 of 3) sorted by relevance

/bsp/yichip/yc3121-pos/Libraries/sdk/
A Dyc_dma.c28 DMA_START(DMACH_MEMCP) |= (DMA_ENABLE); in DMA_ChannelCmd()
32 DMA_START(DMACH_MEMCP) &= ~(DMA_ENABLE); in DMA_ChannelCmd()
48 if (1 == (DMA_START(DMACH_MEMCP) & DMA_ENABLE)) in DMA_IsChannelEnabled()
65 DMA_START(DMACH_MEMCP) |= (1 << DMA_CLEAR_IT_BIT_Pos); in DMA_ClearITPendingBit()
A Dyc_uart.c88 DMA_START(DMACH_UART0) = (1 << DMA_START_BIT); in UART_DMASendBuf()
94 DMA_START(DMACH_UART1) = (1 << DMA_START_BIT); in UART_DMASendBuf()
177 DMA_START(DMACH_UART0) |= (1 << (DMA_RESET_BIT)); in UART_Init()
178 DMA_START(DMACH_UART0) &= ~(1 << (DMA_RESET_BIT)); in UART_Init()
188 DMA_START(DMACH_UART1) |= (1 << (DMA_RESET_BIT)); in UART_Init()
189 DMA_START(DMACH_UART1) &= ~(1 << (DMA_RESET_BIT)); in UART_Init()
349 DMA_START(DMACH_UART0) = (1 << DMA_START_BIT); in UART_SendBuf()
356 DMA_START(DMACH_UART1) = (1 << DMA_START_BIT); in UART_SendBuf()
369 DMA_START(DMACH_UART0) = (1 << DMA_START_BIT); in UART_SendData()
376 DMA_START(DMACH_UART1) = (1 << DMA_START_BIT); in UART_SendData()
/bsp/yichip/yc3121-pos/Libraries/core/
A Dyc3121.h184 #define DMA_START(x) *(volatile uint8_t*)(DMA_BASEADDR + 0x0f + x*0x100) macro

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