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Searched refs:DW_TIMER_CTL_ENABLE_SEL_EN (Results 1 – 2 of 2) sorted by relevance

/bsp/xuantie/libraries/xuantie_libraries/chip_riscv_dummy/include/
A Ddw_timer_ll.h27 #define DW_TIMER_CTL_ENABLE_SEL_EN DW_TIMER_CTL_ENABLE_SEL_Msk macro
95 timer_base->TCR |= (DW_TIMER_CTL_ENABLE_SEL_EN); in dw_timer_set_enable()
99 timer_base->TCR &= ~(DW_TIMER_CTL_ENABLE_SEL_EN); in dw_timer_set_disable()
103 return (((timer_base->TCR) & DW_TIMER_CTL_ENABLE_SEL_EN) ? (uint32_t)1 : (uint32_t)0); in dw_timer_get_enable()
/bsp/cvitek/drivers/
A Ddrv_timer.c79 #define DW_TIMER_CTL_ENABLE_SEL_EN DW_TIMER_CTL_ENABLE_SEL_Msk macro
236 timer_base->TCR |= (DW_TIMER_CTL_ENABLE_SEL_EN); in hal_timer_set_enable()
240 timer_base->TCR &= ~(DW_TIMER_CTL_ENABLE_SEL_EN); in hal_timer_set_disable()
244 if ((timer_base->TCR) & DW_TIMER_CTL_ENABLE_SEL_EN) in hal_timer_get_enable()

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