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Searched refs:EIC_CONFIG_FILTEN0 (Results 1 – 13 of 13) sorted by relevance

/bsp/samd21/sam_d2x_asflib/sam0/drivers/extint/extint_sam_d_r_h/
A Dextint.c279 new_config |= EIC_CONFIG_FILTEN0; in extint_chan_set_config()
285 ~((EIC_CONFIG_SENSE0_Msk | EIC_CONFIG_FILTEN0) << config_pos)) | in extint_chan_set_config()
/bsp/samd21/sam_d2x_asflib/sam0/drivers/extint/extint_sam_l_c/
A Dextint.c307 new_config |= EIC_CONFIG_FILTEN0; in extint_chan_set_config()
313 ~((EIC_CONFIG_SENSE0_Msk | EIC_CONFIG_FILTEN0) << config_pos)) | in extint_chan_set_config()
/bsp/microchip/samc21/bsp/hri/
A Dhri_eic_c21.h707 ((Eic *)hw)->CONFIG[index].reg |= EIC_CONFIG_FILTEN0; in hri_eic_set_CONFIG_FILTEN0_bit()
715 tmp = (tmp & EIC_CONFIG_FILTEN0) >> EIC_CONFIG_FILTEN0_Pos; in hri_eic_get_CONFIG_FILTEN0_bit()
724 tmp &= ~EIC_CONFIG_FILTEN0; in hri_eic_write_CONFIG_FILTEN0_bit()
733 ((Eic *)hw)->CONFIG[index].reg &= ~EIC_CONFIG_FILTEN0; in hri_eic_clear_CONFIG_FILTEN0_bit()
740 ((Eic *)hw)->CONFIG[index].reg ^= EIC_CONFIG_FILTEN0; in hri_eic_toggle_CONFIG_FILTEN0_bit()
/bsp/microchip/samd51-adafruit-metro-m4/bsp/hri/
A Dhri_eic_d51.h733 ((Eic *)hw)->CONFIG[index].reg |= EIC_CONFIG_FILTEN0; in hri_eic_set_CONFIG_FILTEN0_bit()
741 tmp = (tmp & EIC_CONFIG_FILTEN0) >> EIC_CONFIG_FILTEN0_Pos; in hri_eic_get_CONFIG_FILTEN0_bit()
750 tmp &= ~EIC_CONFIG_FILTEN0; in hri_eic_write_CONFIG_FILTEN0_bit()
759 ((Eic *)hw)->CONFIG[index].reg &= ~EIC_CONFIG_FILTEN0; in hri_eic_clear_CONFIG_FILTEN0_bit()
766 ((Eic *)hw)->CONFIG[index].reg ^= EIC_CONFIG_FILTEN0; in hri_eic_toggle_CONFIG_FILTEN0_bit()
/bsp/microchip/samd51-seeed-wio-terminal/bsp/hri/
A Dhri_eic_d51.h733 ((Eic *)hw)->CONFIG[index].reg |= EIC_CONFIG_FILTEN0; in hri_eic_set_CONFIG_FILTEN0_bit()
741 tmp = (tmp & EIC_CONFIG_FILTEN0) >> EIC_CONFIG_FILTEN0_Pos; in hri_eic_get_CONFIG_FILTEN0_bit()
750 tmp &= ~EIC_CONFIG_FILTEN0; in hri_eic_write_CONFIG_FILTEN0_bit()
759 ((Eic *)hw)->CONFIG[index].reg &= ~EIC_CONFIG_FILTEN0; in hri_eic_clear_CONFIG_FILTEN0_bit()
766 ((Eic *)hw)->CONFIG[index].reg ^= EIC_CONFIG_FILTEN0; in hri_eic_toggle_CONFIG_FILTEN0_bit()
/bsp/microchip/same54/bsp/hri/
A Dhri_eic_e54.h733 ((Eic *)hw)->CONFIG[index].reg |= EIC_CONFIG_FILTEN0; in hri_eic_set_CONFIG_FILTEN0_bit()
741 tmp = (tmp & EIC_CONFIG_FILTEN0) >> EIC_CONFIG_FILTEN0_Pos; in hri_eic_get_CONFIG_FILTEN0_bit()
750 tmp &= ~EIC_CONFIG_FILTEN0; in hri_eic_write_CONFIG_FILTEN0_bit()
759 ((Eic *)hw)->CONFIG[index].reg &= ~EIC_CONFIG_FILTEN0; in hri_eic_clear_CONFIG_FILTEN0_bit()
766 ((Eic *)hw)->CONFIG[index].reg ^= EIC_CONFIG_FILTEN0; in hri_eic_toggle_CONFIG_FILTEN0_bit()
/bsp/microchip/samc21/bsp/samc21/include/component/
A Deic.h282 #define EIC_CONFIG_FILTEN0 (_U_(0x1) << EIC_CONFIG_FILTEN0_Pos) macro
/bsp/microchip/same54/bsp/include/component/
A Deic.h282 #define EIC_CONFIG_FILTEN0 (_U_(0x1) << EIC_CONFIG_FILTEN0_Pos) macro
/bsp/microchip/samd51-adafruit-metro-m4/bsp/samd51a/include/component/
A Deic.h282 #define EIC_CONFIG_FILTEN0 (_U_(0x1) << EIC_CONFIG_FILTEN0_Pos) macro
/bsp/microchip/samd51-seeed-wio-terminal/bsp/samd51a/include/component/
A Deic.h282 #define EIC_CONFIG_FILTEN0 (_U_(0x1) << EIC_CONFIG_FILTEN0_Pos) macro
/bsp/microchip/saml10/bsp/include/component/
A Deic.h324 #define EIC_CONFIG_FILTEN0 EIC_CONFIG_FILTEN0_Msk /**< \de… macro
/bsp/samd21/sam_d2x_asflib/sam0/utils/cmsis/samd20/include/component/
A Deic.h544 #define EIC_CONFIG_FILTEN0 (0x1ul << EIC_CONFIG_FILTEN0_Pos) macro
/bsp/samd21/sam_d2x_asflib/sam0/utils/cmsis/samd21/include/component/
A Deic.h541 #define EIC_CONFIG_FILTEN0 (0x1ul << EIC_CONFIG_FILTEN0_Pos) macro

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