Searched refs:EIC_CONFIG_FILTEN7 (Results 1 – 11 of 11) sorted by relevance
987 ((Eic *)hw)->CONFIG[index].reg |= EIC_CONFIG_FILTEN7; in hri_eic_set_CONFIG_FILTEN7_bit()995 tmp = (tmp & EIC_CONFIG_FILTEN7) >> EIC_CONFIG_FILTEN7_Pos; in hri_eic_get_CONFIG_FILTEN7_bit()1004 tmp &= ~EIC_CONFIG_FILTEN7; in hri_eic_write_CONFIG_FILTEN7_bit()1013 ((Eic *)hw)->CONFIG[index].reg &= ~EIC_CONFIG_FILTEN7; in hri_eic_clear_CONFIG_FILTEN7_bit()1020 ((Eic *)hw)->CONFIG[index].reg ^= EIC_CONFIG_FILTEN7; in hri_eic_toggle_CONFIG_FILTEN7_bit()
1013 ((Eic *)hw)->CONFIG[index].reg |= EIC_CONFIG_FILTEN7; in hri_eic_set_CONFIG_FILTEN7_bit()1021 tmp = (tmp & EIC_CONFIG_FILTEN7) >> EIC_CONFIG_FILTEN7_Pos; in hri_eic_get_CONFIG_FILTEN7_bit()1030 tmp &= ~EIC_CONFIG_FILTEN7; in hri_eic_write_CONFIG_FILTEN7_bit()1039 ((Eic *)hw)->CONFIG[index].reg &= ~EIC_CONFIG_FILTEN7; in hri_eic_clear_CONFIG_FILTEN7_bit()1046 ((Eic *)hw)->CONFIG[index].reg ^= EIC_CONFIG_FILTEN7; in hri_eic_toggle_CONFIG_FILTEN7_bit()
401 #define EIC_CONFIG_FILTEN7 (_U_(0x1) << EIC_CONFIG_FILTEN7_Pos) macro
450 #define EIC_CONFIG_FILTEN7 EIC_CONFIG_FILTEN7_Msk /**< \de… macro
663 #define EIC_CONFIG_FILTEN7 (0x1ul << EIC_CONFIG_FILTEN7_Pos) macro
660 #define EIC_CONFIG_FILTEN7 (0x1ul << EIC_CONFIG_FILTEN7_Pos) macro
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