Searched refs:EIC_CTRLA_SWRST_Pos (Results 1 – 10 of 10) sorted by relevance

/bsp/microchip/samc21/bsp/samc21/include/component/
A D	eic.h	59 #define EIC_CTRLA_SWRST_Pos 0 /**< \brief (EIC_CTRLA) Software Reset */ macro 60 #define EIC_CTRLA_SWRST (_U_(0x1) << EIC_CTRLA_SWRST_Pos)
/bsp/microchip/same54/bsp/include/component/
A D	eic.h	59 #define EIC_CTRLA_SWRST_Pos 0 /**< \brief (EIC_CTRLA) Software Reset */ macro 60 #define EIC_CTRLA_SWRST (_U_(0x1) << EIC_CTRLA_SWRST_Pos)
/bsp/microchip/samd51-adafruit-metro-m4/bsp/samd51a/include/component/
A D	eic.h	59 #define EIC_CTRLA_SWRST_Pos 0 /**< \brief (EIC_CTRLA) Software Reset */ macro 60 #define EIC_CTRLA_SWRST (_U_(0x1) << EIC_CTRLA_SWRST_Pos)
/bsp/microchip/samd51-seeed-wio-terminal/bsp/samd51a/include/component/
A D	eic.h	59 #define EIC_CTRLA_SWRST_Pos 0 /**< \brief (EIC_CTRLA) Software Reset */ macro 60 #define EIC_CTRLA_SWRST (_U_(0x1) << EIC_CTRLA_SWRST_Pos)
/bsp/microchip/saml10/bsp/include/component/
A D	eic.h	62 #define EIC_CTRLA_SWRST_Pos 0 /**< (EI… macro 63 #define EIC_CTRLA_SWRST_Msk (_U_(0x1) << EIC_CTRLA_SWRST_Pos) /**< (EI…
/bsp/microchip/samc21/bsp/hri/
A D	hri_eic_c21.h	217 tmp = (tmp & EIC_CTRLA_SWRST) >> EIC_CTRLA_SWRST_Pos; in hri_eic_get_CTRLA_SWRST_bit()
/bsp/microchip/samd51-adafruit-metro-m4/bsp/hri/
A D	hri_eic_d51.h	243 tmp = (tmp & EIC_CTRLA_SWRST) >> EIC_CTRLA_SWRST_Pos; in hri_eic_get_CTRLA_SWRST_bit()
/bsp/microchip/samd51-seeed-wio-terminal/bsp/hri/
A D	hri_eic_d51.h	243 tmp = (tmp & EIC_CTRLA_SWRST) >> EIC_CTRLA_SWRST_Pos; in hri_eic_get_CTRLA_SWRST_bit()
/bsp/microchip/same54/bsp/hri/
A D	hri_eic_e54.h	243 tmp = (tmp & EIC_CTRLA_SWRST) >> EIC_CTRLA_SWRST_Pos; in hri_eic_get_CTRLA_SWRST_bit()
/bsp/microchip/saml10/bsp/hri/
A D	hri_eic_l10.h	289 tmp = (tmp & EIC_CTRLA_SWRST_Msk) >> EIC_CTRLA_SWRST_Pos; in hri_eic_get_CTRLA_SWRST_bit()

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