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Searched refs:EMU (Results 1 – 25 of 79) sorted by relevance

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/bsp/efm32/Libraries/emlib/src/
A Dem_emu.c354 EMU->MEMCTRL = blocks; in EMU_MemPwrDown()
397 uint32_t em4conf = EMU->EM4CONF; in EMU_EM4Init()
414 EMU->EM4CONF = em4conf; in EMU_EM4Init()
430 reg = EMU->PWRCONF & ~( in EMU_BUPDInit()
441 EMU->PWRCONF = reg; in EMU_BUPDInit()
446 EMU->BUINACT = reg; in EMU_BUPDInit()
451 EMU->BUACT = reg; in EMU_BUPDInit()
454 reg = EMU->BUCTRL & ~( in EMU_BUPDInit()
468 EMU->BUCTRL = reg; in EMU_BUPDInit()
493 EMU->BUACT = (EMU->BUACT & ~(_EMU_BUACT_BUEXTHRES_MASK))|(value<<_EMU_BUACT_BUEXTHRES_SHIFT); in EMU_BUThresholdSet()
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A Dem_rmu.c79 locked = EMU->LOCK & EMU_LOCK_LOCKKEY_LOCKED; in RMU_ResetCauseClear()
85 BITBAND_Peripheral(&(EMU->AUXCTRL), 0, 1); in RMU_ResetCauseClear()
86 BITBAND_Peripheral(&(EMU->AUXCTRL), 0, 0); in RMU_ResetCauseClear()
/bsp/efm32/Libraries/emlib/inc/
A Dem_emu.h228 BITBAND_Peripheral(&(EMU->EM4CONF), _EMU_EM4CONF_LOCKCONF_SHIFT, enable); in EMU_EM4Lock()
237 while(!(EMU->STATUS & EMU_STATUS_BURDY)); in EMU_BUReady()
248 BITBAND_Peripheral(&(EMU->ROUTE), _EMU_ROUTE_BUVINPEN_SHIFT, enable); in EMU_BUPinEnable()
265 EMU->LOCK = EMU_LOCK_LOCKKEY_LOCK; in EMU_Lock()
275 EMU->LOCK = EMU_LOCK_LOCKKEY_UNLOCK; in EMU_Unlock()
284 BITBAND_Peripheral(&(EMU->CTRL), _EMU_CTRL_EM2BLOCK_SHIFT, 1U); in EMU_EM2Block()
293 BITBAND_Peripheral(&(EMU->CTRL), _EMU_CTRL_EM2BLOCK_SHIFT, 0U); in EMU_EM2UnBlock()
/bsp/rm48x50/HALCoGen/include/
A Dreg_spi.h57 uint32 EMU; /**< 0x0044: Emulation Receive Buffer */ member
A Dreg_mibspi.h57 uint32 EMU; /**< 0x0044: Emulation Receive Buffer */ member
/bsp/efm32/
A Ddrv_emu.c247 FINSH_FUNCTION_EXPORT(list_emu, list the EMU status)
/bsp/efm32/Libraries/Device/EnergyMicro/EFM32G/Include/
A Defm32g880f128.h314 #define EMU ((EMU_TypeDef *) EMU_BASE) /**< EMU base pointer */ macro
A Defm32g880f32.h314 #define EMU ((EMU_TypeDef *) EMU_BASE) /**< EMU base pointer */ macro
A Defm32g880f64.h314 #define EMU ((EMU_TypeDef *) EMU_BASE) /**< EMU base pointer */ macro
A Defm32g890f128.h314 #define EMU ((EMU_TypeDef *) EMU_BASE) /**< EMU base pointer */ macro
A Defm32g890f32.h314 #define EMU ((EMU_TypeDef *) EMU_BASE) /**< EMU base pointer */ macro
A Defm32g890f64.h314 #define EMU ((EMU_TypeDef *) EMU_BASE) /**< EMU base pointer */ macro
A Defm32g280f128.h352 #define EMU ((EMU_TypeDef *) EMU_BASE) /**< EMU base pointer */ macro
A Defm32g280f32.h352 #define EMU ((EMU_TypeDef *) EMU_BASE) /**< EMU base pointer */ macro
A Defm32g280f64.h352 #define EMU ((EMU_TypeDef *) EMU_BASE) /**< EMU base pointer */ macro
A Defm32g290f128.h352 #define EMU ((EMU_TypeDef *) EMU_BASE) /**< EMU base pointer */ macro
A Defm32g290f32.h352 #define EMU ((EMU_TypeDef *) EMU_BASE) /**< EMU base pointer */ macro
/bsp/efm32/Libraries/Device/EnergyMicro/EFM32GG/Include/
A Defm32gg990f512.h365 #define EMU ((EMU_TypeDef *) EMU_BASE) /**< EMU base pointer */ macro
A Defm32gg995f1024.h365 #define EMU ((EMU_TypeDef *) EMU_BASE) /**< EMU base pointer */ macro
A Defm32gg995f512.h365 #define EMU ((EMU_TypeDef *) EMU_BASE) /**< EMU base pointer */ macro
A Defm32gg980f1024.h365 #define EMU ((EMU_TypeDef *) EMU_BASE) /**< EMU base pointer */ macro
A Defm32gg980f512.h365 #define EMU ((EMU_TypeDef *) EMU_BASE) /**< EMU base pointer */ macro
A Defm32gg990f1024.h365 #define EMU ((EMU_TypeDef *) EMU_BASE) /**< EMU base pointer */ macro
/bsp/efm32/Libraries/Device/EnergyMicro/EFM32GG/Source/ARM/
A Dstartup_efm32gg.s121 DCD EMU_IRQHandler ; 38: EMU Interrupt
/bsp/efm32/Libraries/Device/EnergyMicro/EFM32GG/Source/IAR/
A Dstartup_efm32gg.s121 DCD EMU_IRQHandler ; 38: EMU Interrupt

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