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Searched refs:ENABLE (Results 1 – 25 of 878) sorted by relevance

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/bsp/n32g452xx/n32g452xx-mini-system/board/msp/
A Dn32_msp.c32 GPIO_ConfigPinRemap(GPIO_RMP_USART1, ENABLE); in n32_msp_usart_init()
59 GPIO_ConfigPinRemap(GPIO_RMP1_USART2, ENABLE); in n32_msp_usart_init()
70 GPIO_ConfigPinRemap(GPIO_RMCP2_USART2, ENABLE); in n32_msp_usart_init()
81 GPIO_ConfigPinRemap(GPIO_RMP3_USART2, ENABLE); in n32_msp_usart_init()
146 GPIO_ConfigPinRemap(GPIO_RMP1_UART4, ENABLE); in n32_msp_usart_init()
156 GPIO_ConfigPinRemap(GPIO_RMP2_UART4, ENABLE); in n32_msp_usart_init()
166 GPIO_ConfigPinRemap(GPIO_RMP3_UART4, ENABLE); in n32_msp_usart_init()
193 GPIO_ConfigPinRemap(GPIO_RMP1_UART5, ENABLE); in n32_msp_usart_init()
203 GPIO_ConfigPinRemap(GPIO_RMP2_UART5, ENABLE); in n32_msp_usart_init()
347 GPIO_ConfigPinRemap(GPIO_RMP1_SPI1, ENABLE); in n32_msp_spi_init()
[all …]
/bsp/samd21/sam_d2x_asflib/common/services/storage/ctrl_access/
A Dctrl_access.h97 #error LUN_0 must be defined as ENABLE or DISABLE in conf_access.h
100 #error LUN_1 must be defined as ENABLE or DISABLE in conf_access.h
141 #if LUN_0 == ENABLE
144 #if LUN_1 == ENABLE
147 #if LUN_2 == ENABLE
150 #if LUN_3 == ENABLE
153 #if LUN_4 == ENABLE
156 #if LUN_5 == ENABLE
159 #if LUN_6 == ENABLE
162 #if LUN_7 == ENABLE
[all …]
A Dctrl_access.c192 #if LUN_0 == ENABLE
198 #if LUN_1 == ENABLE
204 #if LUN_2 == ENABLE
210 #if LUN_3 == ENABLE
216 #if LUN_4 == ENABLE
222 #if LUN_5 == ENABLE
228 #if LUN_6 == ENABLE
234 #if LUN_7 == ENABLE
293 #if MEM_USB == ENABLE in get_nb_lun()
328 #if LUN_USB == ENABLE in mem_test_unit_ready()
[all …]
/bsp/wch/arm/ch32f203r-evt/board/
A Dboard.c34 RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE); in ch32f2_usart_clock_and_io_init()
35 RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE); in ch32f2_usart_clock_and_io_init()
50 RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE); in ch32f2_usart_clock_and_io_init()
51 RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE); in ch32f2_usart_clock_and_io_init()
67 RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC, ENABLE); in ch32f2_usart_clock_and_io_init()
83 RCC_APB1PeriphClockCmd(RCC_APB1Periph_UART4, ENABLE); in ch32f2_usart_clock_and_io_init()
259 GPIO_PinRemapConfig(GPIO_Remap_I2C1, ENABLE); in ch32f2_i2c_clock_and_io_init()
287 I2C_Cmd(I2C1, ENABLE); in ch32f2_i2c_config()
288 I2C_AcknowledgeConfig(I2C1, ENABLE); in ch32f2_i2c_config()
301 I2C_Cmd(I2C2, ENABLE); in ch32f2_i2c_config()
[all …]
/bsp/wch/arm/ch32f103c8-core/board/
A Dboard.c34 RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE); in ch32f1_usart_clock_and_io_init()
35 RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE); in ch32f1_usart_clock_and_io_init()
50 RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE); in ch32f1_usart_clock_and_io_init()
51 RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE); in ch32f1_usart_clock_and_io_init()
67 RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC, ENABLE); in ch32f1_usart_clock_and_io_init()
90 RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, ENABLE); in ch32f1_spi_clock_and_io_init()
156 GPIO_PinRemapConfig(GPIO_Remap_I2C1, ENABLE); in ch32f1_i2c_clock_and_io_init()
184 I2C_Cmd(I2C1, ENABLE); in ch32f1_i2c_config()
185 I2C_AcknowledgeConfig(I2C1, ENABLE); in ch32f1_i2c_config()
198 I2C_Cmd(I2C2, ENABLE); in ch32f1_i2c_config()
[all …]
/bsp/bouffalo_lab/bl61x/board/
A Dboard.c29 …CPU_Set_MTimer_CLK(ENABLE, BL_MTIMER_SOURCE_CLOCK_MCU_XCLK, Clock_System_Clock_Get(BL_SYSTEM_CLOCK… in system_clock_init()
48 GLB_Set_UART_CLK(ENABLE, HBN_UART_CLK_XCLK, 0); in peripheral_clock_init()
49 GLB_Set_SPI_CLK(ENABLE, GLB_SPI_CLK_MCU_MUXPLL_160M, 0); in peripheral_clock_init()
50 GLB_Set_I2C_CLK(ENABLE, GLB_I2C_CLK_XCLK, 0); in peripheral_clock_init()
51 GLB_Set_ADC_CLK(ENABLE, GLB_ADC_CLK_XCLK, 1); in peripheral_clock_init()
53 GLB_Set_DIG_512K_CLK(ENABLE, ENABLE, 0x4E); in peripheral_clock_init()
55 GLB_Set_IR_CLK(ENABLE, GLB_IR_CLK_SRC_XCLK, 19); in peripheral_clock_init()
56 GLB_Set_CAM_CLK(ENABLE, GLB_CAM_CLK_WIFIPLL_96M, 3); in peripheral_clock_init()
89 .linear_dis = ENABLE, in psram_winbond_default_init()
91 .disDeepPowerDownMode = ENABLE, in psram_winbond_default_init()
[all …]
/bsp/airm2m/air32f103/board/
A Dboard.c24 RCC_PLLCmd(ENABLE); //使能PLL in SystemClock_Config()
34 RCC_LSICmd(ENABLE); //使能内部低速时钟 in SystemClock_Config()
37 RCC_HSICmd(ENABLE); //使能内部高速时钟 in SystemClock_Config()
49 RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE); in air32_usart_clock_and_io_init()
50 RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE); in air32_usart_clock_and_io_init()
63 RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE); in air32_usart_clock_and_io_init()
64 RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE); in air32_usart_clock_and_io_init()
79 RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC, ENABLE); in air32_usart_clock_and_io_init()
102 RCC_APB2PeriphClockCmd(RCC_APB2Periph_SPI1, ENABLE); in air32_spi_clock_and_io_init()
114 RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI2, ENABLE); in air32_spi_clock_and_io_init()
[all …]
/bsp/n32/libraries/N32WB452_Firmware_Library/n32wb452_ble_driver/profile/
A Duser.c59 …E_NOTIFY_CHAR] = {ATT_DECL_CHARACTERISTIC, PERM(RD, ENABLE) | PERM(WRITE_REQ, ENABLE), 0, …
65 … = {ATT_CHAR_WRITE_NOTIFY, PERM(WRITE_COMMAND, ENABLE)|PERM(NTF, ENABLE), PERM(RI, ENABLE)…
67 …E_NOTIFY_CFG] = {ATT_DESC_CLIENT_CHAR_CFG, PERM(RD, ENABLE) | PERM(WRITE_REQ, ENABLE), 0/*…
72 … PERM(WRITE_REQ, ENABLE) | PERM(WRITE_COMMAND, ENABLE) /*|PERM(NTF, ENABLE)*/,
77 PERM(RD, ENABLE) | PERM(WRITE_REQ, ENABLE),
85 /*PERM(RD, ENABLE) |*/ PERM(NTF, ENABLE),
90 …FG] = {ATT_DESC_CLIENT_CHAR_CFG, PERM(RD, ENABLE) | /* PERM(WP,ENABLE)|*/PERM(WRITE_REQ, E…
103 ret |= PERM(RD, ENABLE); in get_user_character_perm()
107 ret |= PERM(WRITE_COMMAND, ENABLE); in get_user_character_perm()
112 ret |= PERM(WRITE_REQ, ENABLE); in get_user_character_perm()
[all …]
/bsp/bouffalo_lab/bl808/m0/board/
A Dboard.c30 CPU_Set_MTimer_CLK(ENABLE, CPU_Get_MTimer_Source_Clock() / 1000 / 1000 - 1); in system_clock_init()
49 GLB_Set_ADC_CLK(ENABLE, GLB_ADC_CLK_XCLK, 4); in peripheral_clock_init()
50 GLB_Set_UART_CLK(ENABLE, HBN_UART_CLK_XCLK, 0); in peripheral_clock_init()
51 GLB_Set_DSP_UART0_CLK(ENABLE, GLB_DSP_UART_CLK_DSP_XCLK, 0); in peripheral_clock_init()
52 GLB_Set_SPI_CLK(ENABLE, GLB_SPI_CLK_MCU_MUXPLL_160M, 0); in peripheral_clock_init()
53 GLB_Set_I2C_CLK(ENABLE, GLB_I2C_CLK_XCLK, 0); in peripheral_clock_init()
54 GLB_Set_IR_CLK(ENABLE, GLB_IR_CLK_SRC_XCLK, 19); in peripheral_clock_init()
55 GLB_Set_ADC_CLK(ENABLE, GLB_ADC_CLK_XCLK, 1); in peripheral_clock_init()
57 GLB_Set_DIG_512K_CLK(ENABLE, ENABLE, 0x4E); in peripheral_clock_init()
59 GLB_Set_CAM_CLK(ENABLE, GLB_CAM_CLK_WIFIPLL_96M, 3); in peripheral_clock_init()
[all …]
/bsp/hk32/hk32f030c8-mini/board/msp/
A Dhk32_msp.c28 RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE); in hk32_msp_usart_init()
29 RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA, ENABLE); in hk32_msp_usart_init()
46 RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE); in hk32_msp_usart_init()
47 RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOB, ENABLE); in hk32_msp_usart_init()
69 RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA, ENABLE); in hk32_msp_usart_init()
101 RCC_APB1PeriphClockCmd(RCC_APB1Periph_I2C1, ENABLE); in hk32_msp_i2c_init()
102 RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOB, ENABLE); in hk32_msp_i2c_init()
119 RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOB, ENABLE); in hk32_msp_i2c_init()
156 RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA, ENABLE); in hk32_msp_spi_init()
174 RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOB, ENABLE); in hk32_msp_spi_init()
[all …]
A Dhk32_msp.c.orig28 RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE);
29 RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA, ENABLE);
46 RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE);
47 RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOB, ENABLE);
69 RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA, ENABLE);
101 RCC_APB1PeriphClockCmd(RCC_APB1Periph_I2C1, ENABLE);
102 RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOB, ENABLE);
119 RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOB, ENABLE);
156 RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA, ENABLE);
174 RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOB, ENABLE);
[all …]
/bsp/mm32f526x/board/
A Dmm32_msp.c24 RCC_APB2PeriphClockCmd(RCC_APB2Periph_UART1, ENABLE); in mm32_msp_uart_init()
25 RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA, ENABLE); in mm32_msp_uart_init()
44 RCC_APB1PeriphClockCmd(RCC_APB1Periph_UART2, ENABLE); in mm32_msp_uart_init()
45 RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA, ENABLE); in mm32_msp_uart_init()
64 RCC_APB1PeriphClockCmd(RCC_APB1Periph_UART3, ENABLE); in mm32_msp_uart_init()
65 RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOC, ENABLE); in mm32_msp_uart_init()
93 RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1, ENABLE); //Enable ADC1 clock in mm32_msp_adc_init()
94 RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA, ENABLE); in mm32_msp_adc_init()
108 RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC2, ENABLE); //Enable ADC2 clock in mm32_msp_adc_init()
109 RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA, ENABLE); in mm32_msp_adc_init()
/bsp/n32/libraries/n32_drivers/
A Ddrv_adc.c79 ADC_Enable((ADC_Module*)config->adc_periph, ENABLE); in n32_adc_init()
142 RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOA, ENABLE); in rt_hw_adc_init()
143 RCC_EnableAHBPeriphClk(RCC_AHB_PERIPH_ADC, ENABLE); in rt_hw_adc_init()
154 RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOA, ENABLE); in rt_hw_adc_init()
155 RCC_EnableAHBPeriphClk(RCC_AHB_PERIPH_ADC1, ENABLE); in rt_hw_adc_init()
166 RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOA, ENABLE); in rt_hw_adc_init()
167 RCC_EnableAHBPeriphClk(RCC_AHB_PERIPH_ADC2, ENABLE); in rt_hw_adc_init()
178 RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOB, ENABLE); in rt_hw_adc_init()
179 RCC_EnableAHBPeriphClk(RCC_AHB_PERIPH_ADC3, ENABLE); in rt_hw_adc_init()
190 RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOB, ENABLE); in rt_hw_adc_init()
[all …]
A Ddrv_usart_v2.c316 GPIO_ConfigPinRemap(GPIO_RMP_USART1, ENABLE); in n32_uart_mode_set()
354 GPIO_ConfigPinRemap(GPIO_RMP_USART2, ENABLE); in n32_uart_mode_set()
390 GPIO_ConfigPinRemap(GPIO_RMP_USART2, ENABLE); in n32_uart_mode_set()
482 GPIO_ConfigPinRemap(GPIO_RMP1_UART4, ENABLE); in n32_uart_mode_set()
499 GPIO_ConfigPinRemap(GPIO_RMP2_UART4, ENABLE); in n32_uart_mode_set()
778 USART_Enable(uart->handle.Instance, ENABLE); in n32_configure()
791 if (state == ENABLE) in NVIC_Set()
877 NVIC_Set(uart->config->irq_type, ENABLE); in n32_control()
1590 NVIC_Set(DMA_Handle->dma_irq, ENABLE); in n32_uart_dma_config()
1597 NVIC_Set(uart->config->irq_type, ENABLE); in n32_uart_dma_config()
[all …]
A Ddrv_dac.c51 RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_DAC, ENABLE); in n32_dac_init()
65 DAC_Enable(ENABLE); in n32_dac_init()
77 DAC_Enable(channel, ENABLE); in n32_dac_enabled()
79 DAC_Enable(ENABLE); in n32_dac_enabled()
107 DAC_SoftTrgEnable(ENABLE); in n32_set_dac_value()
119 DAC_SoftTrgEnable(DAC_CHANNEL_1, ENABLE); in n32_set_dac_value()
124 DAC_SoftTrgEnable(DAC_CHANNEL_2, ENABLE); in n32_set_dac_value()
159 RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOA, ENABLE); in rt_hw_dac_init()
175 RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOA, ENABLE); in rt_hw_dac_init()
192 RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOA, ENABLE); in rt_hw_dac_init()
A Ddrv_i2c.c238 I2C_ConfigAck((I2C_Module*)i2c_periph, ENABLE); in rt_i2c_read()
241 I2C_GenerateStart((I2C_Module*)i2c_periph, ENABLE); in rt_i2c_read()
293 I2C_ConfigAck((I2C_Module*)i2c_periph, ENABLE); in rt_i2c_read()
310 I2C_ConfigAck((I2C_Module*)i2c_periph, ENABLE); in rt_i2c_write()
311 I2C_GenerateStart((I2C_Module*)i2c_periph, ENABLE); in rt_i2c_write()
345 I2C_GenerateStop((I2C_Module*)i2c_periph, ENABLE); in rt_i2c_write()
435 RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_I2C1, ENABLE); in rt_hw_i2c_init()
444 GPIO_ConfigPinRemap(GPIO_RMP_I2C1, ENABLE); in rt_hw_i2c_init()
447 RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_I2C1, ENABLE); in rt_hw_i2c_init()
482 RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_I2C2, ENABLE); in rt_hw_i2c_init()
[all …]
/bsp/ht32/libraries/HT32_STD_5xxxx_FWLib/library/HT32F5xxxx_Driver/src/
A Dht32f65xxx_66xxx_pga.c462 PGA_InitStruct.PGA_REF = ENABLE; in PGA_SetModeInverting()
465 PGA_InitStruct.PGA_PGA = ENABLE; in PGA_SetModeInverting()
495 PGA_InitStruct.PGA_REF = ENABLE; in PGA_SetModeDifferentiator()
498 PGA_InitStruct.PGA_PGA = ENABLE; in PGA_SetModeDifferentiator()
529 PGA_InitStruct.PGA_PGA = ENABLE; in PGA_SetModeNonInverting()
560 PGA_InitStruct.PGA_REF = ENABLE; in PGA_SetModeInvertingAdder()
562 PGA_InitStruct.PGA_NE = ENABLE; in PGA_SetModeInvertingAdder()
563 PGA_InitStruct.PGA_PGA = ENABLE; in PGA_SetModeInvertingAdder()
594 PGA_InitStruct.PGA_REF = ENABLE; in PGA_SetModeExponent()
596 PGA_InitStruct.PGA_NE = ENABLE; in PGA_SetModeExponent()
[all …]
/bsp/wch/risc-v/Libraries/ch32_drivers/
A Ddrv_i2c.c43 I2C_GenerateSTART(i2c_periph, ENABLE); in i2c_read()
91 I2C_GenerateSTOP(i2c_periph, ENABLE); in i2c_read()
104 I2C_GenerateSTART(i2c_periph, ENABLE); in i2c_write()
144 I2C_GenerateSTOP(i2c_periph, ENABLE); in i2c_write()
210 RCC_APB1PeriphClockCmd(RCC_APB1Periph_I2C1, ENABLE);
211 RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB | RCC_APB2Periph_AFIO, ENABLE);
216 GPIO_PinRemapConfig(GPIO_Remap_I2C1, ENABLE);
220 I2C_Cmd(I2C1, ENABLE);
233 RCC_APB1PeriphClockCmd(RCC_APB1Periph_I2C2, ENABLE);
234 RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB | RCC_APB2Periph_AFIO, ENABLE);
[all …]
/bsp/Vango/v85xxp/Libraries/VangoV85xxP_standard_peripheral/Source/
A Dlib_rtc.c94 RTC_WriteProtection(ENABLE); in RTC_WriteRegisters()
184 RTC_WriteProtection(ENABLE); in RTC_SetTime()
253 if (NewState == ENABLE) in RTC_SubSecondCmd()
270 RTC_WriteProtection(ENABLE); in RTC_SubSecondCmd()
320 RTC_WriteProtection(ENABLE); in RTC_SetAlarm()
379 if (NewState == ENABLE) in RTC_AlarmCmd()
396 RTC_WriteProtection(ENABLE); in RTC_AlarmCmd()
415 if (NewState == ENABLE) in RTC_AlarmAccurateCmd()
432 RTC_WriteProtection(ENABLE); in RTC_AlarmAccurateCmd()
461 if (NewState == ENABLE) in RTC_INTConfig()
[all …]
/bsp/bouffalo_lab/bl70x/board/
A Dboard.c38 GLB_Set_UART_CLK(ENABLE, HBN_UART_CLK_96M, 0); in peripheral_clock_init()
39 GLB_Set_SPI_CLK(ENABLE, 0); in peripheral_clock_init()
40 GLB_Set_I2C_CLK(ENABLE, 0); in peripheral_clock_init()
41 GLB_Set_IR_CLK(ENABLE, GLB_IR_CLK_SRC_XCLK, 15); in peripheral_clock_init()
43 GLB_Set_ADC_CLK(ENABLE, GLB_ADC_CLK_XCLK, 1); in peripheral_clock_init()
44 GLB_Set_DAC_CLK(ENABLE, GLB_DAC_CLK_XCLK, 0x3E); in peripheral_clock_init()
46 GLB_Set_USB_CLK(ENABLE); in peripheral_clock_init()
146 bflb_psram_cache_write_set(&ap_memory1604, SF_CTRL_QIO_MODE, ENABLE, DISABLE, DISABLE); in board_psram_init()
/bsp/bouffalo_lab/bl60x/board/
A Dboard.c34 GLB_Set_UART_CLK(ENABLE, HBN_UART_CLK_160M, 0); in peripheral_clock_init()
35 GLB_Set_SPI_CLK(ENABLE, 0); in peripheral_clock_init()
36 GLB_Set_I2C_CLK(ENABLE, 0); in peripheral_clock_init()
38 GLB_Set_ADC_CLK(ENABLE, GLB_ADC_CLK_XCLK, 1); in peripheral_clock_init()
39 GLB_Set_DAC_CLK(ENABLE, GLB_DAC_CLK_XCLK, 0x3E); in peripheral_clock_init()
/bsp/wch/risc-v/ch32v103r-evt/board/
A Ddebug.c98 RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1 | RCC_APB2Periph_GPIOA, ENABLE); in USART_Printf_Init()
106 RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE); in USART_Printf_Init()
107 RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE); in USART_Printf_Init()
115 RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3, ENABLE); in USART_Printf_Init()
116 RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE); in USART_Printf_Init()
134 USART_Cmd(USART1, ENABLE); in USART_Printf_Init()
138 USART_Cmd(USART2, ENABLE); in USART_Printf_Init()
142 USART_Cmd(USART3, ENABLE); in USART_Printf_Init()
/bsp/Vango/v85xx/Libraries/VangoV85xx_standard_peripheral/Source/
A Dlib_rtc.c95 RTC_WriteProtection(ENABLE); in RTC_WriteRegisters()
164 RTC_WriteProtection(ENABLE); in RTC_SetTime()
224 if (NewState == ENABLE) in RTC_INTConfig()
347 RTC_WriteProtection(ENABLE); in RTC_AutoCalInit()
380 RTC_WriteProtection(ENABLE); in RTC_TrigSourceConfig()
423 RTC_WriteProtection(ENABLE); in RTC_AutoCalCmd()
446 RTC_WriteProtection(ENABLE); in RTC_StartAutoCalManual()
502 RTC_WriteProtection(ENABLE); in RTC_WKUSecondsConfig()
533 RTC_WriteProtection(ENABLE); in RTC_WKUMinutesConfig()
564 RTC_WriteProtection(ENABLE); in RTC_WKUHoursConfig()
[all …]
/bsp/ht32/ht32f53252/board/src/
A Dht32_msp.c24 CKCU_PeripClockConfig(CKCUClock, ENABLE); in ht32_usart_gpio_init()
37 CKCU_PeripClockConfig(CKCUClock, ENABLE); in ht32_usart_gpio_init()
50 CKCU_PeripClockConfig(CKCUClock, ENABLE); in ht32_usart_gpio_init()
63 CKCU_PeripClockConfig(CKCUClock, ENABLE); in ht32_usart_gpio_init()
86 CKCU_PeripClockConfig(CKCUClock, ENABLE); in ht32_spi_gpio_init()
99 CKCU_PeripClockConfig(CKCUClock, ENABLE); in ht32_spi_gpio_init()
120 CKCU_PeripClockConfig(CKCUClock, ENABLE); in ht32_hardware_i2c_gpio_init()
131 CKCU_PeripClockConfig(CKCUClock, ENABLE); in ht32_hardware_i2c_gpio_init()
152 CKCU_PeripClockConfig(CKCUClock, ENABLE); in ht32_adc_gpio_init()
216 CKCU_PeripClockConfig(CKCUClock, ENABLE); in ht32_adc_gpio_init()
[all …]
/bsp/nxp/lpc/lpc178x/drivers/
A Dlpc177x_8x_uart.c711 if (NewState == ENABLE) in UART_IntConfig()
838 if (FIFOCfg->FIFO_ResetTxBuf == ENABLE) in UART_FIFOConfig()
848 if (FIFOCfg->FIFO_DMAMode == ENABLE) in UART_FIFOConfig()
912 if (NewState == ENABLE) in UART_ABCmd()
926 if (NewState == ENABLE) in UART_ABCmd()
949 if (NewState == ENABLE) in UART_ABCmd()
1008 if (NewState == ENABLE) in UART_TxCmd()
1044 if (NewState == ENABLE) in UART_IrDAInvtInputCmd()
1065 if (NewState == ENABLE) in UART_IrDACmd()
1184 if (NewState == ENABLE) in UART_FullModemConfigMode()
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