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Searched refs:FCR_FIFO_MASK (Results 1 – 2 of 2) sorted by relevance

/bsp/ht32/libraries/HT32_STD_5xxxx_FWLib/library/HT32F5xxxx_Driver/src/
A Dht32f5xxxx_spi.c87 #define FCR_FIFO_MASK (u32)0x00000007 macro
89 #define FCR_FIFO_MASK (u32)0x0000000F macro
510 tmpreg = SPIx->FSR & FCR_FIFO_MASK; in SPI_GetFIFOStatus()
514 tmpreg = (SPIx->FSR & (FCR_FIFO_MASK << 4)) >> 4; in SPI_GetFIFOStatus()
560 SPIx->FCR = ((SPIx->FCR & (0x00000400 | (FCR_FIFO_MASK << 4))) | SPI_FIFOLevel); in SPI_FIFOTriggerLevelConfig()
564 SPIx->FCR = ((SPIx->FCR & (0x00000400 | FCR_FIFO_MASK)) | (SPI_FIFOLevel << 4)); in SPI_FIFOTriggerLevelConfig()
/bsp/ht32/libraries/HT32_STD_1xxxx_FWLib/library/HT32F1xxxx_Driver/src/
A Dht32f1xxxx_spi.c69 #define FCR_FIFO_MASK (u32)0x0000000F macro
471 tmpreg = SPIx->FSR & FCR_FIFO_MASK; in SPI_GetFIFOStatus()
475 tmpreg = (SPIx->FSR & (FCR_FIFO_MASK << 4)) >> 4; in SPI_GetFIFOStatus()
521 SPIx->FCR = ((SPIx->FCR & (0x00000400 | (FCR_FIFO_MASK << 4))) | SPI_FIFOLevel); in SPI_FIFOTriggerLevelConfig()
525 SPIx->FCR = ((SPIx->FCR & (0x00000400 | FCR_FIFO_MASK)) | (SPI_FIFOLevel << 4)); in SPI_FIFOTriggerLevelConfig()

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