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Searched refs:FMC (Results 1 – 25 of 78) sorted by relevance

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/bsp/apm32/libraries/APM32E10x_Library/APM32E10x_StdPeriphDriver/src/
A Dapm32e10x_fmc.c51 FMC->CTRL1_B.WS = latency; in FMC_ConfigLatency()
63 FMC->CTRL1_B.HCAEN = BIT_SET; in FMC_EnableHalfCycleAccess()
87 FMC->CTRL1_B.PBEN = ENABLE; in FMC_EnablePrefetchBuffer()
99 FMC->CTRL1_B.PBEN = DISABLE; in FMC_DisablePrefetchBuffer()
111 FMC->KEY = 0x45670123; in FMC_Unlock()
112 FMC->KEY = 0xCDEF89AB; in FMC_Unlock()
147 FMC->ADDR = pageAddr; in FMC_ErasePage()
537 FMC->OBKEY = 0x45670123; in FMC_ConfigUserOptionByte()
538 FMC->OBKEY = 0xCDEF89AB; in FMC_ConfigUserOptionByte()
578 return FMC->WRTPROT; in FMC_ReadOptionByteWriteProtection()
[all …]
/bsp/apm32/libraries/APM32F10x_Library/APM32F10x_StdPeriphDriver/src/
A Dapm32f10x_fmc.c51 FMC->CTRL1_B.WS = latency; in FMC_ConfigLatency()
63 FMC->CTRL1_B.HCAEN = BIT_SET; in FMC_EnableHalfCycleAccess()
87 FMC->CTRL1_B.PBEN = ENABLE; in FMC_EnablePrefetchBuffer()
99 FMC->CTRL1_B.PBEN = DISABLE; in FMC_DisablePrefetchBuffer()
111 FMC->KEY = 0x45670123; in FMC_Unlock()
112 FMC->KEY = 0xCDEF89AB; in FMC_Unlock()
147 FMC->ADDR = pageAddr; in FMC_ErasePage()
537 FMC->OBKEY = 0x45670123; in FMC_ConfigUserOptionByte()
538 FMC->OBKEY = 0xCDEF89AB; in FMC_ConfigUserOptionByte()
578 return FMC->WRTPROT; in FMC_ReadOptionByteWriteProtection()
[all …]
/bsp/apm32/libraries/APM32S10x_Library/APM32S10x_StdPeriphDriver/src/
A Dapm32s10x_fmc.c51 FMC->CTRL1_B.WS = latency; in FMC_ConfigLatency()
63 FMC->CTRL1_B.HCAEN = BIT_SET; in FMC_EnableHalfCycleAccess()
87 FMC->CTRL1_B.PBEN = ENABLE; in FMC_EnablePrefetchBuffer()
99 FMC->CTRL1_B.PBEN = DISABLE; in FMC_DisablePrefetchBuffer()
111 FMC->KEY = 0x45670123; in FMC_Unlock()
112 FMC->KEY = 0xCDEF89AB; in FMC_Unlock()
147 FMC->ADDR = pageAddr; in FMC_ErasePage()
531 FMC->OBKEY = 0x45670123; in FMC_ConfigUserOptionByte()
532 FMC->OBKEY = 0xCDEF89AB; in FMC_ConfigUserOptionByte()
572 return FMC->WRTPROT; in FMC_ReadOptionByteWriteProtection()
[all …]
/bsp/apm32/libraries/APM32F0xx_Library/APM32F0xx_StdPeriphDriver/src/
A Dapm32f0xx_fmc.c75 FMC->CTRL1_B.WS = latency; in FMC_SetLatency()
87 FMC->CTRL1_B.PBEN = ENABLE; in FMC_EnablePrefetchBuffer()
99 FMC->CTRL1_B.PBEN = DISABLE; in FMC_DisablePrefetchBuffer()
111 if (FMC->CTRL1_B.PBSF) in FMC_ReadPrefetchBufferStatus()
128 FMC->KEY = FMC_KEY_1; in FMC_Unlock()
129 FMC->KEY = FMC_KEY_2; in FMC_Unlock()
160 status = FMC->STS; in FMC_ReadState()
230 FMC->ADDR = pageAddr; in FMC_ErasePage()
355 FMC->OBKEY = FMC_OB_KEY_1; in FMC_UnlockOptionByte()
931 FMC->CTRL2 |= interrupt; in FMC_EnableInterrupt()
[all …]
/bsp/apm32/libraries/APM32F4xx_Library/APM32F4xx_StdPeriphDriver/src/
A Dapm32f4xx_fmc.c170 FMC->KEY = FMC_KEY1; in FMC_Unlock()
171 FMC->KEY = FMC_KEY2; in FMC_Unlock()
184 FMC->CTRL |= FMC_CTRL_LOCK; in FMC_Lock()
233 FMC->CTRL &= 0xFFFFFCFF; in FMC_EraseSector()
234 FMC->CTRL |= tmp_psize; in FMC_EraseSector()
235 FMC->CTRL &= 0xFFFFFF07; in FMC_EraseSector()
240 FMC->CTRL &= 0xFFFFFF07; in FMC_EraseSector()
288 FMC->CTRL &= 0xFFFFFCFF; in FMC_EraseAllSectors()
289 FMC->CTRL |= tmp_psize; in FMC_EraseAllSectors()
318 FMC->CTRL &= 0xFFFFFCFF; in FMC_ProgramDoubleWord()
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/bsp/apm32/libraries/APM32E10x_Library/Device/Geehy/APM32E10x/Source/
A Dsystem_apm32e10x.c255 FMC->CTRL1_B.PBEN = BIT_SET; in SystemClockHSE()
257 FMC->CTRL1_B.WS = 0; in SystemClockHSE()
302 FMC->CTRL1_B.PBEN = BIT_SET; in SystemClock24M()
304 FMC->CTRL1_B.WS = 0; in SystemClock24M()
357 FMC->CTRL1_B.PBEN = BIT_SET; in SystemClock36M()
359 FMC->CTRL1_B.WS = 1; in SystemClock36M()
414 FMC->CTRL1_B.WS = 1; in SystemClock48M()
468 FMC->CTRL1_B.WS = 2; in SystemClock56M()
522 FMC->CTRL1_B.WS = 2; in SystemClock72M()
577 FMC->CTRL1_B.WS = 3; in SystemClock96M()
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/bsp/gd32/risc-v/libraries/GD32VF103_Firmware_Library/GD32VF103_standard_peripheral/Include/
A Dgd32vf103_fmc.h44 #define FMC FMC_BASE /*!< FMC register base address */ macro
48 #define FMC_WS REG32((FMC) + 0x00U) /*!< FMC wait state register */
49 #define FMC_KEY REG32((FMC) + 0x04U) /*!< FMC unlock key register */
50 #define FMC_OBKEY REG32((FMC) + 0x08U) /*!< FMC option bytes unlock key…
51 #define FMC_STAT REG32((FMC) + 0x0CU) /*!< FMC status register */
52 #define FMC_CTL REG32((FMC) + 0x10U) /*!< FMC control register */
53 #define FMC_ADDR REG32((FMC) + 0x14U) /*!< FMC address register */
54 #define FMC_OBSTAT REG32((FMC) + 0x1CU) /*!< FMC option bytes status reg…
56 #define FMC_PID REG32((FMC) + 0x100U) /*!< FMC product ID register */
114 #define FMC_REG_VAL(offset) (REG32(FMC + ((uint32_t)(offset) >> 6)))
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/bsp/apm32/libraries/APM32S10x_Library/Device/Geehy/APM32S10x/Source/
A Dsystem_apm32s10x.c249 FMC->CTRL1_B.PBEN = BIT_SET; in SystemClockHSE()
251 FMC->CTRL1_B.WS = 0; in SystemClockHSE()
295 FMC->CTRL1_B.PBEN = BIT_SET; in SystemClock24M()
297 FMC->CTRL1_B.WS = 0; in SystemClock24M()
349 FMC->CTRL1_B.PBEN = BIT_SET; in SystemClock36M()
351 FMC->CTRL1_B.WS = 1; in SystemClock36M()
403 FMC->CTRL1_B.PBEN = BIT_SET; in SystemClock48M()
405 FMC->CTRL1_B.WS = 1; in SystemClock48M()
458 FMC->CTRL1_B.WS = 2; in SystemClock56M()
511 FMC->CTRL1_B.WS = 2; in SystemClock72M()
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/bsp/apm32/libraries/APM32F10x_Library/Device/Geehy/APM32F10x/Source/
A Dsystem_apm32f10x.c305 FMC->CTRL1_B.PBEN = BIT_SET; in SystemClockHSE()
312 FMC->CTRL1_B.WS = 0; in SystemClockHSE()
317 FMC->CTRL1_B.WS = 1; in SystemClockHSE()
322 FMC->CTRL1_B.WS = 0; in SystemClockHSE()
366 FMC->CTRL1_B.PBEN = BIT_SET; in SystemClock24M()
368 FMC->CTRL1_B.WS = 0; in SystemClock24M()
444 FMC->CTRL1_B.WS = 1; in SystemClock36M()
520 FMC->CTRL1_B.WS = 1; in SystemClock48M()
594 FMC->CTRL1_B.WS = 2; in SystemClock56M()
668 FMC->CTRL1_B.WS = 2; in SystemClock72M()
[all …]
/bsp/apm32/libraries/APM32F0xx_Library/Device/Geehy/APM32F0xx/Source/
A Dsystem_apm32f0xx.c252 FMC->CTRL1_B.PBEN = BIT_SET; in SystemClockHSE()
254 FMC->CTRL1_B.WS = 0; in SystemClockHSE()
298 FMC->CTRL1_B.PBEN = BIT_SET; in SystemClock24M()
300 FMC->CTRL1_B.WS = 1; in SystemClock24M()
355 FMC->CTRL1_B.PBEN = BIT_SET; in SystemClock36M()
357 FMC->CTRL1_B.WS = 1; in SystemClock36M()
412 FMC->CTRL1_B.PBEN = BIT_SET; in SystemClock48M()
414 FMC->CTRL1_B.WS = 1; in SystemClock48M()
/bsp/synwit/libraries/SWM341_CSL/SWM341_StdPeriph_Driver/
A DSWM341_flash.c44 IAP_Cache_Reset((FMC->CACHE | FMC_CACHE_CCLR_Msk), 0x0B11FFAC); // Cache Clear in FLASH_Erase()
70 IAP_Cache_Reset((FMC->CACHE | FMC_CACHE_CCLR_Msk), 0x0B11FFAC); // Cache Clear in FLASH_Write()
/bsp/stm32/stm32f469-st-disco/board/CubeMX_Config/
A DCubeMX_Config.ioc24 FMC.ExitSelfRefreshDelay1=7
26 FMC.LoadToActiveDelay1=2
27 FMC.RCDDelay1=2
28 FMC.RPDelay1=2
29 FMC.RPDelay2=2
30 FMC.ReadBurst1=FMC_SDRAM_RBURST_ENABLE
32 FMC.RowCycleDelay1=7
33 FMC.RowCycleDelay2=7
36 FMC.SelfRefreshTime1=4
37 FMC.WriteRecoveryTime1=3
[all …]
/bsp/stm32/stm32h743-atk-apollo/board/CubeMX_Config/
A DCubeMX_Config.ioc16 FMC.CASLatency1=FMC_SDRAM_CAS_LATENCY_2
18 FMC.ExitSelfRefreshDelay1=8
20 FMC.LoadToActiveDelay1=2
21 FMC.RCDDelay1=2
22 FMC.RPDelay1=2
23 FMC.ReadBurst1=FMC_SDRAM_RBURST_ENABLE
24 FMC.ReadPipeDelay1=FMC_SDRAM_RPIPE_DELAY_1
25 FMC.RowCycleDelay1=6
27 FMC.SelfRefreshTime1=6
28 FMC.WriteRecoveryTime1=4
[all …]
/bsp/stm32/stm32h743-openmv-h7plus/board/CubeMX_Config/
A DCubeMX_Config.ioc30 FMC.BankMapConfig=FMC_SWAPBMAP_DISABLE
31 FMC.CASLatency1=FMC_SDRAM_CAS_LATENCY_2
33 FMC.ExitSelfRefreshDelay1=7
35 FMC.LoadToActiveDelay1=2
36 FMC.RCDDelay1=2
37 FMC.RPDelay1=2
38 FMC.ReadBurst1=FMC_SDRAM_RBURST_ENABLE
39 FMC.RowCycleDelay1=6
41 FMC.SelfRefreshTime1=5
42 FMC.WriteRecoveryTime1=3
[all …]
/bsp/frdm-k64f/device/MK64F12/
A Dfsl_flash.c2468 FMC->PFB01CR |= FMC_PFB01CR_S_INV_MASK; in FLASH_PflashSetPrefetchSpeculation()
2472 FMC->PFB0CR |= FMC_PFB0CR_S_INV_MASK; in FLASH_PflashSetPrefetchSpeculation()
2474 FMC->PFB0CR |= FMC_PFB0CR_S_B_INV_MASK; in FLASH_PflashSetPrefetchSpeculation()
2551 value = FMC->PFB01CR; in FLASH_PflashGetPrefetchSpeculation()
2555 value = FMC->PFB0CR; in FLASH_PflashGetPrefetchSpeculation()
2740 FMC->PFB01CR = (FMC->PFB01CR & ~FMC_PFB01CR_CINV_WAY_MASK) | FMC_PFB01CR_CINV_WAY(~0); in fmc_flash_cache_clear()
2742 FMC->PFB0CR = (FMC->PFB0CR & ~FMC_PFB0CR_CINV_WAY_MASK) | FMC_PFB0CR_CINV_WAY(~0); in fmc_flash_cache_clear()
2816 FMC->PFB01CR |= FMC_PFB01CR_S_INV_MASK; in fmc_flash_prefetch_speculation_clear()
2818 FMC->PFB01CR |= FMC_PFB01CR_S_B_INV_MASK; in fmc_flash_prefetch_speculation_clear()
2820 FMC->PFB0CR |= FMC_PFB0CR_S_INV_MASK; in fmc_flash_prefetch_speculation_clear()
[all …]
/bsp/rv32m1_vega/rv32m1_sdk_riscv/devices/RV32M1/drivers/
A Dfsl_flash.c2553 FMC->PFB01CR |= FMC_PFB01CR_S_INV_MASK; in FLASH_PflashSetPrefetchSpeculation()
2557 FMC->PFB0CR |= FMC_PFB0CR_S_INV_MASK; in FLASH_PflashSetPrefetchSpeculation()
2559 FMC->PFB0CR |= FMC_PFB0CR_S_B_INV_MASK; in FLASH_PflashSetPrefetchSpeculation()
2636 value = FMC->PFB01CR; in FLASH_PflashGetPrefetchSpeculation()
2640 value = FMC->PFB0CR; in FLASH_PflashGetPrefetchSpeculation()
2839 FMC->PFB01CR = (FMC->PFB01CR & ~FMC_PFB01CR_CINV_WAY_MASK) | FMC_PFB01CR_CINV_WAY(~0); in fmc_flash_cache_clear()
2841 FMC->PFB0CR = (FMC->PFB0CR & ~FMC_PFB0CR_CINV_WAY_MASK) | FMC_PFB0CR_CINV_WAY(~0); in fmc_flash_cache_clear()
2928 FMC->PFB01CR |= FMC_PFB01CR_S_INV_MASK; in fmc_flash_prefetch_speculation_clear()
2930 FMC->PFB01CR |= FMC_PFB01CR_S_B_INV_MASK; in fmc_flash_prefetch_speculation_clear()
2932 FMC->PFB0CR |= FMC_PFB0CR_S_INV_MASK; in fmc_flash_prefetch_speculation_clear()
[all …]
/bsp/stm32/stm32f429-st-disco/board/CubeMX_Config/
A DCubeMX_Config.ioc2 FMC.CASLatency1=FMC_SDRAM_CAS_LATENCY_3
3 FMC.ExitSelfRefreshDelay1=7
5 FMC.LoadToActiveDelay1=2
6 FMC.RCDDelay1=2
7 FMC.RPDelay1=2
8 FMC.RPDelay2=2
12 FMC.RowCycleDelay1=7
13 FMC.RowCycleDelay2=7
16 FMC.SelfRefreshTime1=4
17 FMC.WriteRecoveryTime1=3
[all …]
/bsp/nuvoton/libraries/m031/
A DREADME.md13 | FMC | FAL | ***N/A*** |
/bsp/nuvoton/libraries/m2354/
A DREADME.md18 | FMC | FAL | ***N/A*** |
/bsp/nuvoton/libraries/m460/
A DREADME.md21 | FMC | FAL | ***N/A*** |
/bsp/nuvoton/libraries/m480/
A DREADME.md19 | FMC | FAL | ***N/A*** |
/bsp/stm32/stm32h743-armfly-v7/
A DREADME.md39 8. 双网口：1个DM9162 PHY芯片（CPU内置MAC）,一个DM9000AEP，挂在FMC总线16bit
/bsp/n32/libraries/N32G45x_Firmware_Library/n32g45x_std_periph_driver/src/
A Dn32g45x_can.c309 CAN1->FMC |= FMC_FINITM; in CAN1_InitFilter()
379 CAN1->FMC &= ~FMC_FINITM; in CAN1_InitFilter()
402 CAN2->FMC |= FMC_FINITM; in CAN2_InitFilter()
472 CAN2->FMC &= ~FMC_FINITM; in CAN2_InitFilter()
/bsp/n32/libraries/N32G4FR_Firmware_Library/n32g4fr_std_periph_driver/src/
A Dn32g4fr_can.c309 CAN1->FMC |= FMC_FINITM; in CAN1_InitFilter()
379 CAN1->FMC &= ~FMC_FINITM; in CAN1_InitFilter()
402 CAN2->FMC |= FMC_FINITM; in CAN2_InitFilter()
472 CAN2->FMC &= ~FMC_FINITM; in CAN2_InitFilter()
/bsp/n32/libraries/N32WB452_Firmware_Library/n32wb452_std_periph_driver/src/
A Dn32wb452_can.c309 CAN1->FMC |= FMC_FINITM; in CAN1_InitFilter()
379 CAN1->FMC &= ~FMC_FINITM; in CAN1_InitFilter()
402 CAN2->FMC |= FMC_FINITM; in CAN2_InitFilter()
472 CAN2->FMC &= ~FMC_FINITM; in CAN2_InitFilter()

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