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Searched refs:FPU_REG_SIZE (Results 1 – 4 of 4) sorted by relevance

/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/soc/bl808/std/startup/d0/
A Dirq_ctx.h93 #define FPU_REG_SIZE 1 /* size in uint64_t */ macro
95 #define FPU_REG_SIZE 2 macro
100 #define REG_F0_NDX (INT_XCPT_REGS + FPU_REG_SIZE * 0)
101 #define REG_F1_NDX (INT_XCPT_REGS + FPU_REG_SIZE * 1)
102 #define REG_F2_NDX (INT_XCPT_REGS + FPU_REG_SIZE * 2)
103 #define REG_F3_NDX (INT_XCPT_REGS + FPU_REG_SIZE * 3)
104 #define REG_F4_NDX (INT_XCPT_REGS + FPU_REG_SIZE * 4)
105 #define REG_F5_NDX (INT_XCPT_REGS + FPU_REG_SIZE * 5)
106 #define REG_F6_NDX (INT_XCPT_REGS + FPU_REG_SIZE * 6)
107 #define REG_F7_NDX (INT_XCPT_REGS + FPU_REG_SIZE * 7)
[all …]
/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/soc/bl808/std/startup/lp/
A Dirq_ctx.h89 #define FPU_REG_SIZE 1 /* size in uint32_t */ macro
91 #define REG_F0_NDX (INT_XCPT_REGS + FPU_REG_SIZE * 0)
92 #define REG_F1_NDX (INT_XCPT_REGS + FPU_REG_SIZE * 1)
93 #define REG_F2_NDX (INT_XCPT_REGS + FPU_REG_SIZE * 2)
94 #define REG_F3_NDX (INT_XCPT_REGS + FPU_REG_SIZE * 3)
95 #define REG_F4_NDX (INT_XCPT_REGS + FPU_REG_SIZE * 4)
96 #define REG_F5_NDX (INT_XCPT_REGS + FPU_REG_SIZE * 5)
97 #define REG_F6_NDX (INT_XCPT_REGS + FPU_REG_SIZE * 6)
98 #define REG_F7_NDX (INT_XCPT_REGS + FPU_REG_SIZE * 7)
99 #define REG_F8_NDX (INT_XCPT_REGS + FPU_REG_SIZE * 8)
[all …]
/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/soc/bl808/std/startup/m0/
A Dirq_ctx.h95 #define FPU_REG_SIZE 1 /* size in uint32_t */ macro
97 #define REG_F0_NDX (INT_XCPT_REGS + FPU_REG_SIZE * 0)
98 #define REG_F1_NDX (INT_XCPT_REGS + FPU_REG_SIZE * 1)
99 #define REG_F2_NDX (INT_XCPT_REGS + FPU_REG_SIZE * 2)
100 #define REG_F3_NDX (INT_XCPT_REGS + FPU_REG_SIZE * 3)
101 #define REG_F4_NDX (INT_XCPT_REGS + FPU_REG_SIZE * 4)
102 #define REG_F5_NDX (INT_XCPT_REGS + FPU_REG_SIZE * 5)
103 #define REG_F6_NDX (INT_XCPT_REGS + FPU_REG_SIZE * 6)
104 #define REG_F7_NDX (INT_XCPT_REGS + FPU_REG_SIZE * 7)
105 #define REG_F8_NDX (INT_XCPT_REGS + FPU_REG_SIZE * 8)
[all …]
/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/soc/bl616/std/startup/
A Dirq_ctx.h95 #define FPU_REG_SIZE 1 /* size in uint32_t */ macro
97 #define REG_F0_NDX (INT_XCPT_REGS + FPU_REG_SIZE * 0)
98 #define REG_F1_NDX (INT_XCPT_REGS + FPU_REG_SIZE * 1)
99 #define REG_F2_NDX (INT_XCPT_REGS + FPU_REG_SIZE * 2)
100 #define REG_F3_NDX (INT_XCPT_REGS + FPU_REG_SIZE * 3)
101 #define REG_F4_NDX (INT_XCPT_REGS + FPU_REG_SIZE * 4)
102 #define REG_F5_NDX (INT_XCPT_REGS + FPU_REG_SIZE * 5)
103 #define REG_F6_NDX (INT_XCPT_REGS + FPU_REG_SIZE * 6)
104 #define REG_F7_NDX (INT_XCPT_REGS + FPU_REG_SIZE * 7)
105 #define REG_F8_NDX (INT_XCPT_REGS + FPU_REG_SIZE * 8)
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