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Searched refs:FREQM_CTRLA_ENABLE (Results 1 – 10 of 10) sorted by relevance

/bsp/samd21/sam_d2x_asflib/sam0/drivers/freqm/
A Dfreqm.h276 freqm_module->CTRLA.reg |= FREQM_CTRLA_ENABLE; in freqm_enable()
306 freqm_module->CTRLA.reg &= ~FREQM_CTRLA_ENABLE; in freqm_disable()
/bsp/microchip/samd51-adafruit-metro-m4/bsp/hri/
A Dhri_freqm_d51.h230 ((Freqm *)hw)->CTRLA.reg |= FREQM_CTRLA_ENABLE; in hri_freqm_set_CTRLA_ENABLE_bit()
240 tmp = (tmp & FREQM_CTRLA_ENABLE) >> FREQM_CTRLA_ENABLE_Pos; in hri_freqm_get_CTRLA_ENABLE_bit()
249 tmp &= ~FREQM_CTRLA_ENABLE; in hri_freqm_write_CTRLA_ENABLE_bit()
259 ((Freqm *)hw)->CTRLA.reg &= ~FREQM_CTRLA_ENABLE; in hri_freqm_clear_CTRLA_ENABLE_bit()
267 ((Freqm *)hw)->CTRLA.reg ^= FREQM_CTRLA_ENABLE; in hri_freqm_toggle_CTRLA_ENABLE_bit()
/bsp/microchip/samc21/bsp/hri/
A Dhri_freqm_c21.h230 ((Freqm *)hw)->CTRLA.reg |= FREQM_CTRLA_ENABLE; in hri_freqm_set_CTRLA_ENABLE_bit()
240 tmp = (tmp & FREQM_CTRLA_ENABLE) >> FREQM_CTRLA_ENABLE_Pos; in hri_freqm_get_CTRLA_ENABLE_bit()
249 tmp &= ~FREQM_CTRLA_ENABLE; in hri_freqm_write_CTRLA_ENABLE_bit()
259 ((Freqm *)hw)->CTRLA.reg &= ~FREQM_CTRLA_ENABLE; in hri_freqm_clear_CTRLA_ENABLE_bit()
267 ((Freqm *)hw)->CTRLA.reg ^= FREQM_CTRLA_ENABLE; in hri_freqm_toggle_CTRLA_ENABLE_bit()
/bsp/microchip/samd51-seeed-wio-terminal/bsp/hri/
A Dhri_freqm_d51.h230 ((Freqm *)hw)->CTRLA.reg |= FREQM_CTRLA_ENABLE; in hri_freqm_set_CTRLA_ENABLE_bit()
240 tmp = (tmp & FREQM_CTRLA_ENABLE) >> FREQM_CTRLA_ENABLE_Pos; in hri_freqm_get_CTRLA_ENABLE_bit()
249 tmp &= ~FREQM_CTRLA_ENABLE; in hri_freqm_write_CTRLA_ENABLE_bit()
259 ((Freqm *)hw)->CTRLA.reg &= ~FREQM_CTRLA_ENABLE; in hri_freqm_clear_CTRLA_ENABLE_bit()
267 ((Freqm *)hw)->CTRLA.reg ^= FREQM_CTRLA_ENABLE; in hri_freqm_toggle_CTRLA_ENABLE_bit()
/bsp/microchip/same54/bsp/hri/
A Dhri_freqm_e54.h230 ((Freqm *)hw)->CTRLA.reg |= FREQM_CTRLA_ENABLE; in hri_freqm_set_CTRLA_ENABLE_bit()
240 tmp = (tmp & FREQM_CTRLA_ENABLE) >> FREQM_CTRLA_ENABLE_Pos; in hri_freqm_get_CTRLA_ENABLE_bit()
249 tmp &= ~FREQM_CTRLA_ENABLE; in hri_freqm_write_CTRLA_ENABLE_bit()
259 ((Freqm *)hw)->CTRLA.reg &= ~FREQM_CTRLA_ENABLE; in hri_freqm_clear_CTRLA_ENABLE_bit()
267 ((Freqm *)hw)->CTRLA.reg ^= FREQM_CTRLA_ENABLE; in hri_freqm_toggle_CTRLA_ENABLE_bit()
/bsp/microchip/samc21/bsp/samc21/include/component/
A Dfreqm.h60 #define FREQM_CTRLA_ENABLE (_U_(0x1) << FREQM_CTRLA_ENABLE_Pos) macro
/bsp/microchip/samd51-adafruit-metro-m4/bsp/samd51a/include/component/
A Dfreqm.h60 #define FREQM_CTRLA_ENABLE (_U_(0x1) << FREQM_CTRLA_ENABLE_Pos) macro
/bsp/microchip/same54/bsp/include/component/
A Dfreqm.h60 #define FREQM_CTRLA_ENABLE (_U_(0x1) << FREQM_CTRLA_ENABLE_Pos) macro
/bsp/microchip/samd51-seeed-wio-terminal/bsp/samd51a/include/component/
A Dfreqm.h60 #define FREQM_CTRLA_ENABLE (_U_(0x1) << FREQM_CTRLA_ENABLE_Pos) macro
/bsp/microchip/saml10/bsp/include/component/
A Dfreqm.h65 #define FREQM_CTRLA_ENABLE FREQM_CTRLA_ENABLE_Msk /**< \de… macro

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