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Searched refs:FSMC (Results 1 – 19 of 19) sorted by relevance

/bsp/mm32f327x/Libraries/MM32F327x/HAL_Lib/Src/
A Dhal_fsmc.c68 FSMC->SMSKR = (u32)init_struct->FSMC_TimingRegSelect | \ in FSMC_NORSRAMInit()
83FSMC->SMTMGR_SET0 = (u32)(FSMC_Bank_InitStruct->FSMC_SMReadPipe << FSMC_SMTMGR_SET_SM_READ_PIPE_Po… in FSMC_NORSRAM_Bank_Init()
89 FSMC->SMCTLR &= ~FSMC_SMCTLR_SM_DATA_WIDTH_SET0; in FSMC_NORSRAM_Bank_Init()
90FSMC->SMCTLR |= (FSMC_Bank_InitStruct->FSMC_DataWidth) << FSMC_SMCTLR_SM_DATA_WIDTH_SET0_Pos; in FSMC_NORSRAM_Bank_Init()
93FSMC->SMTMGR_SET1 = (u32)(FSMC_Bank_InitStruct->FSMC_SMReadPipe << FSMC_SMTMGR_SET_SM_READ_PIPE_Po… in FSMC_NORSRAM_Bank_Init()
99 FSMC->SMCTLR &= ~FSMC_SMCTLR_SM_DATA_WIDTH_SET1; in FSMC_NORSRAM_Bank_Init()
100FSMC->SMCTLR |= (FSMC_Bank_InitStruct->FSMC_DataWidth) << FSMC_SMCTLR_SM_DATA_WIDTH_SET1_Pos; in FSMC_NORSRAM_Bank_Init()
103FSMC->SMTMGR_SET2 = (u32)(FSMC_Bank_InitStruct->FSMC_SMReadPipe << FSMC_SMTMGR_SET_SM_READ_PIPE_Po… in FSMC_NORSRAM_Bank_Init()
109 FSMC->SMCTLR &= ~FSMC_SMCTLR_SM_DATA_WIDTH_SET2; in FSMC_NORSRAM_Bank_Init()
110FSMC->SMCTLR |= (FSMC_Bank_InitStruct->FSMC_DataWidth) << FSMC_SMCTLR_SM_DATA_WIDTH_SET2_Pos; in FSMC_NORSRAM_Bank_Init()
/bsp/stm32/stm32f103-fire-arbitrary/board/CubeMX_Config/
A Dstm32f103zet6.ioc14 FSMC.AttributeSpaceSetupTime1=4
16 FSMC.CommonSpaceHiZSetupTime1=4
17 FSMC.CommonSpaceHoldSetupTime1=2
18 FSMC.CommonSpaceSetupTime1=4
23 FSMC.NandBlockNbr1=1024
24 FSMC.NandBlockSize1=64
25 FSMC.NandPageSize1=2048
26 FSMC.NandPlaneNbr1=1024
27 FSMC.NandPlaneSize1=1024
28 FSMC.NandSpareAreaSize1=64
[all …]
/bsp/stm32/stm32f103-atk-warshipv3/board/CubeMX_Config/
A DCubeMX_Config.ioc2 FSMC.AddressSetupTime1=0
3 FSMC.BusTurnAroundDuration1=0
4 FSMC.DataSetupTime1=3
5 FSMC.IPParameters=AddressSetupTime1,DataSetupTime1,BusTurnAroundDuration1,WriteOperation1
6 FSMC.WriteOperation1=FSMC_WRITE_OPERATION_ENABLE
10 Mcu.IP0=FSMC
201 …alse-HAL-false,3-MX_USART1_UART_Init-USART1-false-HAL-true,4-MX_FSMC_Init-FSMC-false-HAL-true,5-MX…
/bsp/stm32/stm32f103-100ask-pro/board/CubeMX_Config/
A DCubeMX_Config.ioc22 FSMC.AddressSetupTime1=0
23 FSMC.BusTurnAroundDuration1=0
24 FSMC.DataSetupTime1=3
25 FSMC.ExtendedMode1=FSMC_EXTENDED_MODE_DISABLE
26 FSMC.IPParameters=WriteOperation1,ExtendedMode1,AddressSetupTime1,BusTurnAroundDuration1,DataSetupT…
27 FSMC.WriteOperation1=FSMC_WRITE_OPERATION_ENABLE
46 Mcu.IP4=FSMC
/bsp/stm32/stm32f407-rt-spark/board/CubeMX_Config/
A DCubeMX_Config.ioc16 FSMC.IPParameters=WriteOperation1
17 FSMC.WriteOperation1=FSMC_WRITE_OPERATION_ENABLE
37 Mcu.IP3=FSMC
246 …-true,14-MX_USB_OTG_FS_PCD_Init-USB_OTG_FS-false-HAL-true,15-MX_FSMC_Init-FSMC-false-HAL-true,16-M…
/bsp/stm32/stm32f407-atk-explorer/board/CubeMX_Config/
A DCubeMX_Config.ioc4 FSMC.IPParameters=WriteOperation1
5 FSMC.WriteOperation1=FSMC_WRITE_OPERATION_ENABLE
21 Mcu.IP2=FSMC
294 …se-HAL-true,17-MX_USB_OTG_FS_PCD_Init-USB_OTG_FS-false-HAL-true,18-MX_FSMC_Init-FSMC-false-HAL-true
/bsp/stm32/stm32f407-fk407m2-zgt6/board/CubeMX_Config/
A DCubeMX_Config.ioc4 FSMC.IPParameters=WriteOperation1
5 FSMC.WriteOperation1=FSMC_WRITE_OPERATION_ENABLE
21 Mcu.IP2=FSMC
294 …se-HAL-true,17-MX_USB_OTG_FS_PCD_Init-USB_OTG_FS-false-HAL-true,18-MX_FSMC_Init-FSMC-false-HAL-true
/bsp/mm32f327x/Libraries/MM32F327x/Include/
A Dreg_fsmc.h106 #define FSMC ((FSMC_TypeDef*) FSMC_BASE) macro
/bsp/mm32f526x/
A DREADME.md36 - FSMC 接口,支持外扩 SRAM/PSRAM/NOR Flash 类型,兼容 8080/6800 通信总线模式
/bsp/stm32/stm32g474-st-nucleo/
A DREADME.md8 …h memory, and 128 Kbytes of SRAM), a flexible external memory controller (FSMC) for static memorie…
36 - External memory interface for static memories FSMC supporting SRAM, PSRAM, NOR and NAND memories
/bsp/stm32/stm32l496-st-nucleo/
A DREADME.md9 … Flash memory, 320 Kbyte of SRAM), a flexible external memory controller (FSMC) for static memorie…
/bsp/stm32/stm32l476-st-nucleo/
A DREADME.md9 …1 Mbyte, up to 128 Kbyte of SRAM), a flexible external memory controller (FSMC) for static memorie…
/bsp/stm32/stm32l552-st-nucleo/
A DREADME.md7 …sh memory and 256 Kbytes of SRAM), a flexible external memory controller (FSMC) for static memorie…
/bsp/wch/arm/Libraries/CH32F20x_StdPeriph_Driver/CMSIS/WCH/CH32F20x/Source/ARM/
A Dstartup_ch32f20x.s113 DCD FSMC_IRQHandler ; FSMC
/bsp/airm2m/air32f103/libraries/Startup/arm/
A Dstartup_air32f10x.s109 DCD FSMC_IRQHandler ; FSMC
/bsp/airm2m/air32f103/libraries/Startup/iar/
A Dstartup_air32f10x.s121 DCD FSMC_IRQHandler ; FSMC
/bsp/stm32/stm32u575-st-nucleo/
A DREADME.md13 …speed memories (up to 2 Mbytes of Flash memory and 786 Kbytes of SRAM), a FSMC (flexible external …
/bsp/stm32/stm32u585-iot02a/
A DREADME.md13 …speed memories (up to 2 Mbytes of Flash memory and 786 Kbytes of SRAM), a FSMC (flexible external …
/bsp/mm32/libraries/MM32F3270_HAL/CMSIS/Device/MM32/MM32F3277/Include/
A Dmm32f3277g.h8516 #define FSMC ((FSMC_Type*)FSMC_BASE) macro

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