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Searched refs:FSMC_NORSRAM_TypeDef (Results 1 – 5 of 5) sorted by relevance

/bsp/stm32/libraries/STM32L1xx_HAL/STM32L1xx_HAL_Driver/Inc/
A Dstm32l1xx_ll_fsmc.h108 #define FSMC_NORSRAM_TypeDef FSMC_Bank1_TypeDef macro
486 HAL_StatusTypeDef FSMC_NORSRAM_Init(FSMC_NORSRAM_TypeDef *Device,
488 HAL_StatusTypeDef FSMC_NORSRAM_Timing_Init(FSMC_NORSRAM_TypeDef *Device,
493 HAL_StatusTypeDef FSMC_NORSRAM_DeInit(FSMC_NORSRAM_TypeDef *Device,
502 HAL_StatusTypeDef FSMC_NORSRAM_WriteOperation_Enable(FSMC_NORSRAM_TypeDef *Device, uint32_t Bank);
503 HAL_StatusTypeDef FSMC_NORSRAM_WriteOperation_Disable(FSMC_NORSRAM_TypeDef *Device, uint32_t Bank);
A Dstm32l1xx_hal_sram.h67 FSMC_NORSRAM_TypeDef *Instance; /*!< Register base address */
A Dstm32l1xx_hal_nor.h114 FSMC_NORSRAM_TypeDef *Instance; /*!< Register base address */
/bsp/stm32/libraries/STM32L1xx_HAL/STM32L1xx_HAL_Driver/Src/
A Dstm32l1xx_ll_fsmc.c155 HAL_StatusTypeDef FSMC_NORSRAM_Init(FSMC_NORSRAM_TypeDef *Device, in FSMC_NORSRAM_Init()
238 HAL_StatusTypeDef FSMC_NORSRAM_DeInit(FSMC_NORSRAM_TypeDef *Device, in FSMC_NORSRAM_DeInit()
275 HAL_StatusTypeDef FSMC_NORSRAM_Timing_Init(FSMC_NORSRAM_TypeDef *Device, in FSMC_NORSRAM_Timing_Init()
372 HAL_StatusTypeDef FSMC_NORSRAM_WriteOperation_Enable(FSMC_NORSRAM_TypeDef *Device, uint32_t Bank) in FSMC_NORSRAM_WriteOperation_Enable()
390 HAL_StatusTypeDef FSMC_NORSRAM_WriteOperation_Disable(FSMC_NORSRAM_TypeDef *Device, uint32_t Bank) in FSMC_NORSRAM_WriteOperation_Disable()
/bsp/stm32/libraries/STM32L1xx_HAL/STM32L1xx_HAL_Driver/Inc/Legacy/
A Dstm32_hal_legacy.h560 #define FSMC_NORSRAM_TYPEDEF FSMC_NORSRAM_TypeDef

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