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Searched refs:GCLK_GENCTRL_IDC (Results 1 – 13 of 13) sorted by relevance

/bsp/microchip/samc21/bsp/hri/
A Dhri_gclk_c21.h243 ((Gclk *)hw)->GENCTRL[index].reg |= GCLK_GENCTRL_IDC; in hri_gclk_set_GENCTRL_IDC_bit()
252 tmp = (tmp & GCLK_GENCTRL_IDC) >> GCLK_GENCTRL_IDC_Pos; in hri_gclk_get_GENCTRL_IDC_bit()
261 tmp &= ~GCLK_GENCTRL_IDC; in hri_gclk_write_GENCTRL_IDC_bit()
271 ((Gclk *)hw)->GENCTRL[index].reg &= ~GCLK_GENCTRL_IDC; in hri_gclk_clear_GENCTRL_IDC_bit()
279 ((Gclk *)hw)->GENCTRL[index].reg ^= GCLK_GENCTRL_IDC; in hri_gclk_toggle_GENCTRL_IDC_bit()
/bsp/microchip/samd51-seeed-wio-terminal/bsp/hri/
A Dhri_gclk_d51.h258 ((Gclk *)hw)->GENCTRL[index].reg |= GCLK_GENCTRL_IDC; in hri_gclk_set_GENCTRL_IDC_bit()
267 tmp = (tmp & GCLK_GENCTRL_IDC) >> GCLK_GENCTRL_IDC_Pos; in hri_gclk_get_GENCTRL_IDC_bit()
276 tmp &= ~GCLK_GENCTRL_IDC; in hri_gclk_write_GENCTRL_IDC_bit()
286 ((Gclk *)hw)->GENCTRL[index].reg &= ~GCLK_GENCTRL_IDC; in hri_gclk_clear_GENCTRL_IDC_bit()
294 ((Gclk *)hw)->GENCTRL[index].reg ^= GCLK_GENCTRL_IDC; in hri_gclk_toggle_GENCTRL_IDC_bit()
/bsp/microchip/same54/bsp/hri/
A Dhri_gclk_e54.h258 ((Gclk *)hw)->GENCTRL[index].reg |= GCLK_GENCTRL_IDC; in hri_gclk_set_GENCTRL_IDC_bit()
267 tmp = (tmp & GCLK_GENCTRL_IDC) >> GCLK_GENCTRL_IDC_Pos; in hri_gclk_get_GENCTRL_IDC_bit()
276 tmp &= ~GCLK_GENCTRL_IDC; in hri_gclk_write_GENCTRL_IDC_bit()
286 ((Gclk *)hw)->GENCTRL[index].reg &= ~GCLK_GENCTRL_IDC; in hri_gclk_clear_GENCTRL_IDC_bit()
294 ((Gclk *)hw)->GENCTRL[index].reg ^= GCLK_GENCTRL_IDC; in hri_gclk_toggle_GENCTRL_IDC_bit()
/bsp/microchip/samd51-adafruit-metro-m4/bsp/hri/
A Dhri_gclk_d51.h258 ((Gclk *)hw)->GENCTRL[index].reg |= GCLK_GENCTRL_IDC; in hri_gclk_set_GENCTRL_IDC_bit()
267 tmp = (tmp & GCLK_GENCTRL_IDC) >> GCLK_GENCTRL_IDC_Pos; in hri_gclk_get_GENCTRL_IDC_bit()
276 tmp &= ~GCLK_GENCTRL_IDC; in hri_gclk_write_GENCTRL_IDC_bit()
286 ((Gclk *)hw)->GENCTRL[index].reg &= ~GCLK_GENCTRL_IDC; in hri_gclk_clear_GENCTRL_IDC_bit()
294 ((Gclk *)hw)->GENCTRL[index].reg ^= GCLK_GENCTRL_IDC; in hri_gclk_toggle_GENCTRL_IDC_bit()
/bsp/microchip/saml10/bsp/include/component/
A Dgclk.h162 #define GCLK_GENCTRL_IDC GCLK_GENCTRL_IDC_Msk /**< \de… macro
/bsp/microchip/samc21/bsp/samc21/include/component/
A Dgclk.h176 #define GCLK_GENCTRL_IDC (_U_(0x1) << GCLK_GENCTRL_IDC_Pos) macro
/bsp/samd21/sam_d2x_asflib/sam0/drivers/system/clock/clock_samd20/
A Dgclk.c162 new_genctrl_config |= GCLK_GENCTRL_IDC; in system_gclk_gen_set_config()
/bsp/samd21/sam_d2x_asflib/sam0/drivers/system/clock/clock_samd21_r21_da_ha1/
A Dgclk.c162 new_genctrl_config |= GCLK_GENCTRL_IDC; in system_gclk_gen_set_config()
/bsp/samd21/sam_d2x_asflib/sam0/utils/cmsis/samd21/include/component/
A Dgclk.h262 #define GCLK_GENCTRL_IDC (0x1ul << GCLK_GENCTRL_IDC_Pos) macro
/bsp/samd21/sam_d2x_asflib/sam0/utils/cmsis/samd20/include/component/
A Dgclk.h261 #define GCLK_GENCTRL_IDC (0x1ul << GCLK_GENCTRL_IDC_Pos) macro
/bsp/microchip/samd51-seeed-wio-terminal/bsp/samd51a/include/component/
A Dgclk.h193 #define GCLK_GENCTRL_IDC (_U_(0x1) << GCLK_GENCTRL_IDC_Pos) macro
/bsp/microchip/samd51-adafruit-metro-m4/bsp/samd51a/include/component/
A Dgclk.h193 #define GCLK_GENCTRL_IDC (_U_(0x1) << GCLK_GENCTRL_IDC_Pos) macro
/bsp/microchip/same54/bsp/include/component/
A Dgclk.h193 #define GCLK_GENCTRL_IDC (_U_(0x1) << GCLK_GENCTRL_IDC_Pos) macro

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