Searched refs:GENMASK (Results 1 – 15 of 15) sorted by relevance
| /bsp/k230/drivers/interdrv/sdio/ |
| A D | drv_sdhci.h | 192 #define SDHCI_TIMEOUT_CLK_MASK GENMASK(5, 0)
194 #define SDHCI_CLOCK_BASE_MASK GENMASK(13, 8)
195 #define SDHCI_CLOCK_V3_BASE_MASK GENMASK(15, 8)
219 #define SDHCI_RETUNING_MODE_MASK GENMASK(15, 14)
220 #define SDHCI_CLOCK_MUL_MASK GENMASK(23, 16)
225 #define SDHCI_MAX_CURRENT_LIMIT GENMASK(7, 0)
226 #define SDHCI_MAX_CURRENT_330_MASK GENMASK(7, 0)
227 #define SDHCI_MAX_CURRENT_300_MASK GENMASK(15, 8)
228 #define SDHCI_MAX_CURRENT_180_MASK GENMASK(23, 16)
252 #define SDHCI_PRESET_DRV_MASK GENMASK(15, 14)
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| /bsp/ft2004/libraries/bsp/ft_gmac/ |
| A D | ft_gmac_hw.h | 222 #define GENMASK(h, l) \ macro
228 #define DMA_TDES0_COLLISION_COUNT_MASK GENMASK(6, 3)
242 #define DMA_TDES1_BUFFER1_SIZE_MASK GENMASK(10, 0)
243 #define DMA_TDES1_BUFFER2_SIZE_MASK GENMASK(21, 11)
250 #define DMA_TDES1_CHECKSUM_INSERTION_MASK GENMASK(28, 27)
279 #define DMA_RDES1_BUFFER1_SIZE_MASK GENMASK(10, 0)
280 #define DMA_RDES1_BUFFER2_SIZE_MASK GENMASK(21, 11)
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| /bsp/allwinner/libraries/sunxi-hal/hal/source/ccmu/sunxi-ng/ |
| A D | ccu_nkmp.c | 234 n_mask = GENMASK(nkmp->n.width + nkmp->n.shift - 1, in ccu_nkmp_set_rate()
237 k_mask = GENMASK(nkmp->k.width + nkmp->k.shift - 1, in ccu_nkmp_set_rate()
240 m_mask = GENMASK(nkmp->m.width + nkmp->m.shift - 1, in ccu_nkmp_set_rate()
243 p_mask = GENMASK(nkmp->p.width + nkmp->p.shift - 1, in ccu_nkmp_set_rate()
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| A D | ccu_nkm.c | 185 reg &= ~GENMASK(nkm->n.width + nkm->n.shift - 1, nkm->n.shift); in ccu_nkm_set_rate()
186 reg &= ~GENMASK(nkm->k.width + nkm->k.shift - 1, nkm->k.shift); in ccu_nkm_set_rate()
187 reg &= ~GENMASK(nkm->m.width + nkm->m.shift - 1, nkm->m.shift); in ccu_nkm_set_rate()
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| A D | ccu_nm.c | 221 reg &= ~GENMASK(nm->m.width + nm->m.shift - 1, nm->m.shift); in ccu_nm_set_rate()
258 reg &= ~GENMASK(nm->n.width + nm->n.shift - 1, nm->n.shift); in ccu_nm_set_rate()
259 reg &= ~GENMASK(nm->m.width + nm->m.shift - 1, nm->m.shift); in ccu_nm_set_rate()
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| A D | ccu_nk.c | 153 reg &= ~GENMASK(nk->n.width + nk->n.shift - 1, nk->n.shift); in ccu_nk_set_rate()
154 reg &= ~GENMASK(nk->k.width + nk->k.shift - 1, nk->k.shift); in ccu_nk_set_rate()
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| A D | ccu_phase.c | 131 reg &= ~GENMASK(phase->width + phase->shift - 1, phase->shift); in ccu_phase_set_phase()
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| A D | ccu_mp.c | 253 reg &= ~GENMASK(cmp->m.width + cmp->m.shift - 1, cmp->m.shift); in ccu_mp_set_rate()
254 reg &= ~GENMASK(cmp->p.width + cmp->p.shift - 1, cmp->p.shift); in ccu_mp_set_rate()
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| A D | ccu_div.c | 113 reg &= ~GENMASK(cd->div.width + cd->div.shift - 1, cd->div.shift); in ccu_div_set_rate()
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| A D | ccu_mult.c | 150 reg &= ~GENMASK(cm->mult.width + cm->mult.shift - 1, cm->mult.shift); in ccu_mult_set_rate()
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| A D | ccu_mux.c | 209 reg &= ~GENMASK(cm->width + cm->shift - 1, cm->shift); in ccu_mux_helper_set_parent()
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| A D | ccu.h | 51 #define GENMASK(h, l) \ macro
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| A D | ccu-sun8iw20.c | 1279 val &= ~GENMASK(25, 24); in sunxi_ccu_init()
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| /bsp/core-v-mcu/Libraries/core_v_hal_libraries/bmsis/core-v-mcu/include/ |
| A D | bits.h | 26 #define GENMASK(h, l) \ macro
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| /bsp/phytium/libraries/drivers/ |
| A D | drv_qspi.c | 116 const u32 mask = (u32)GENMASK(1, 0); in RTQspiFlashWriteData()
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