| /bsp/nxp/mcx/mcxn/frdm-mcxn947/board/MCUX_Config/board/ |
| A D | pin_mux.h | 84 #define FLEXIO_WR_GPIO GPIO0
90 #define FLEXIO_RD_GPIO GPIO0
95 #define FLEXIO_CS_GPIO GPIO0
99 #define FLEXIO_RS_GPIO GPIO0
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| /bsp/nxp/mcx/mcxn/frdm-mcxn236/board/MCUX_Config/board/ |
| A D | pin_mux.h | 84 #define FLEXIO_WR_GPIO GPIO0
90 #define FLEXIO_RD_GPIO GPIO0
95 #define FLEXIO_CS_GPIO GPIO0
99 #define FLEXIO_RS_GPIO GPIO0
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| /bsp/ti/c28x/libraries/tms320f28379d/common/source/ |
| A D | F2837xD_I2C.c | 80 GpioCtrlRegs.GPAPUD.bit.GPIO0 = 0; in I2cAGpioConfig()
87 GpioCtrlRegs.GPAQSEL1.bit.GPIO0 = 3; in I2cAGpioConfig()
96 GpioCtrlRegs.GPAGMUX1.bit.GPIO0 = 1; in I2cAGpioConfig()
97 GpioCtrlRegs.GPAMUX1.bit.GPIO0 = 2; in I2cAGpioConfig()
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| A D | F2837xD_EPwm.c | 81 GpioCtrlRegs.GPAPUD.bit.GPIO0 = 1; // Disable pull-up on GPIO0 (EPWM1A) in InitEPwm1Gpio()
92 GpioCtrlRegs.GPAMUX1.bit.GPIO0 = 1; // Configure GPIO0 as EPWM1A in InitEPwm1Gpio()
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| /bsp/samd21/sam_d2x_asflib/sam0/drivers/gpio/ |
| A D | gpio.c | 139 GPIO0->OUTENCLR.reg = (1 << gpio_pin); in gpio_pin_set_config()
167 GPIO0->OUTENSET.reg = (1 << gpio_pin); in gpio_pin_set_config()
194 regval = GPIO0->DATA.reg; in gpio_pin_get_input_level()
222 regval = GPIO0->DATAOUT.reg; in gpio_pin_get_output_level()
247 GPIO0->DATAOUT.reg |= (1 << gpio_pin); in gpio_pin_set_output_level()
249 GPIO0->DATAOUT.reg &= ~(1 << gpio_pin); in gpio_pin_set_output_level()
276 GPIO0->DATAOUT.reg ^= (1 << gpio_pin); in gpio_pin_toggle_output_level()
581 _gpio_instances[0].hw = (void *)GPIO0; in gpio_init()
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| /bsp/rockchip/common/drivers/ |
| A D | drv_gpio.c | 64 #ifdef GPIO0
65 GPIO0,
258 #ifdef GPIO0
262 HAL_GPIO_IRQHandler(GPIO0, GPIO_BANK0); in pin_gpio0_handler()
314 #ifdef GPIO0 in rt_hw_gpio_init()
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| /bsp/phytium/doc/drivers/ |
| A D | gpio.md | 3 …号。96 位 GPIO 信号，支持外部中断功能，每路中断信号没有优先级区分，并产生一个统一的中断报送到全芯片的中断管理模块。在中断管理模块内可针对 GPIO0~5 两路中断设置不同的优先级。支持中…
4 蔽和清除。GPIO0~2 的每位中断单独上报，GPIO3~5 的中断由模块内合成一个中断上报
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| /bsp/rockchip/common/rk_hal/lib/hal/inc/ |
| A D | hal_def.h | 158 #ifdef GPIO0
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| A D | hal_pinctrl.h | 34 #if defined(GPIO0)
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| /bsp/maxim/libraries/MAX32660PeriphDriver/CMSIS/Device/Maxim/MAX32660/Source/ARM/ |
| A D | startup_max32660.s | 115 DCD GPIO0_IRQHandler ; 0x28 0x00A0 40: GPIO0
245 EXPORT GPIO0_IRQHandler [WEAK] ; 0x28 0x00A0 40: GPIO0
304 GPIO0_IRQHandler ; 0x28 0x00A0 40: GPIO0
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| /bsp/ti/c28x/libraries/tms320f28379d/headers/include/ |
| A D | F2837xD_gpio.h | 67 Uint16 GPIO0:2; // 1:0 Select input qualification type for GPIO0 member
115 Uint16 GPIO0:2; // 1:0 Defines pin-muxing selection for GPIO0 member
203 Uint16 GPIO0:1; // 0 Pull-Up Disable control for this pin member
243 Uint16 GPIO0:1; // 0 Input inversion control for this pin member
283 Uint16 GPIO0:1; // 0 Outpout Open-Drain control for this pin member
371 Uint16 GPIO0:4; // 3:0 GPIO0 Master CPU Select member
435 Uint16 GPIO0:1; // 0 Configuration Lock bit for this pin member
2878 Uint16 GPIO0:1; // 0 Data Register for this pin member
2918 Uint16 GPIO0:1; // 0 Output Set bit for this pin member
2958 Uint16 GPIO0:1; // 0 Output Clear bit for this pin member
[all …]
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| A D | F2837xD_sysctrl.h | 1575 Uint16 GPIO0:1; // 0 GPIO0 Enable for LPM Wakeup member
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| /bsp/rockchip/common/rk_hal/lib/hal/src/pinctrl/ |
| A D | hal_pinctrl_v2.c | 290 #ifdef GPIO0 in PINCTRL_SetIOMUX()
344 #ifdef GPIO0 in PINCTRL_SetDS()
398 #ifdef GPIO0 in PINCTRL_SetPUPD()
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| /bsp/nxp/mcx/mcxn/Libraries/drivers/ |
| A D | drv_pin.c | 26 static GPIO_Type *GPIO_TYPE_TBL[] = {GPIO0, GPIO1, GPIO2, GPIO3, GPIO4};
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| /bsp/k210/drivers/ |
| A D | Kconfig | 61 bool "Enable I2C1 (GPIO0/1)"
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| /bsp/nxp/lpc/lpc43xx/Libraries/Device/NXP/LPC43xx/Source/Templates/ARM/ |
| A D | startup_LPC43xx.s | 108 DCD GPIO0_IRQHandler ; 48 GPIO0
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| /bsp/xplorer4330/Libraries/Device/NXP/LPC43xx/Source/Templates/ARM/ |
| A D | startup_LPC43xx.s | 108 DCD GPIO0_IRQHandler ; 48 GPIO0
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| /bsp/synwit/libraries/SWM320_drivers/ |
| A D | drv_gpio.c | 26 #define GPIO0 ((GPIO_TypeDef *)(0)) macro
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| /bsp/nxp/lpc/lpc43xx/Libraries/Device/NXP/LPC43xx/Source/Templates/IAR/ |
| A D | startup_LPC43xx.s | 112 DCD GPIO0_IRQHandler ; 48 GPIO0
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| /bsp/xplorer4330/Libraries/Device/NXP/LPC43xx/Source/Templates/IAR/ |
| A D | startup_LPC43xx.s | 112 DCD GPIO0_IRQHandler ; 48 GPIO0
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| /bsp/rockchip/common/rk_hal/lib/CMSIS/Device/RK2108/Include/ |
| A D | rk2108.h | 1072 #define GPIO0 ((struct GPIO_REG *) GPIO0_BASE) macro
1107 #define IS_GPIO_INSTANCE(instance) (((instance) == GPIO0) || ((instance) == GPIO1))
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