Searched refs:HAL_CLK_PLL_DDR0 (Results 1 – 4 of 4) sorted by relevance
| /bsp/allwinner/libraries/sunxi-hal/hal/source/ccmu/sunxi/ |
| A D | platform_clk.h | 64 HAL_CLK_PLL_DDR0, enumerator
|
| /bsp/allwinner/libraries/sunxi-hal/hal/test/ccmu/ |
| A D | test_ccmu.c | 33 { HAL_CLK_PLL_DDR0, "HAL_CLK_PLL_DDR0"},
|
| /bsp/allwinner/libraries/sunxi-hal/hal/source/ccmu/sunxi/sun8iw19p1/ |
| A D | clk_sun8iw19.c | 765 SUNXI_CLK_FIXED_FACTOR(pll_ddrdiv4, HAL_CLK_PLL_DDRDIV4, HAL_CLK_PLL_DDR0, HAL_CLK_FACTOR, 1, 4);
786 SUNXI_CLK_FACTOR(pll_ddr, HAL_CLK_PLL_DDR0, HAL_CLK_SRC_HOSC24M, HAL_CLK_FIXED_SRC, 1056000000U, 24…
808 hal_clk_id_t sdram_parents[] = {HAL_CLK_PLL_DDR0};
|
| /bsp/allwinner/libraries/sunxi-hal/hal/source/ccmu/sunxi/sun8iw18p1/ |
| A D | clk_sun8iw18.c | 580 SUNXI_CLK_FACTOR(pll_ddr, HAL_CLK_PLL_DDR0, HAL_CLK_SRC_HOSC24M, HAL_CLK_FIXED_SRC, 1056000000U, 24…
597 hal_clk_id_t sdram_parents[] = {HAL_CLK_PLL_DDR0};
|
Completed in 14 milliseconds