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Searched refs:IFCR (Results 1 – 25 of 62) sorted by relevance

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/bsp/airm2m/air32f103/libraries/AIR32F10xLib/src/
A Dair32f10x_dma.c107 DMA1->IFCR |= DMA1_Channel1_IT_Mask; in DMA_DeInit()
112 DMA1->IFCR |= DMA1_Channel2_IT_Mask; in DMA_DeInit()
117 DMA1->IFCR |= DMA1_Channel3_IT_Mask; in DMA_DeInit()
122 DMA1->IFCR |= DMA1_Channel4_IT_Mask; in DMA_DeInit()
127 DMA1->IFCR |= DMA1_Channel5_IT_Mask; in DMA_DeInit()
132 DMA1->IFCR |= DMA1_Channel6_IT_Mask; in DMA_DeInit()
137 DMA1->IFCR |= DMA1_Channel7_IT_Mask; in DMA_DeInit()
508 DMA2->IFCR = DMAy_FLAG; in DMA_ClearFlag()
513 DMA1->IFCR = DMAy_FLAG; in DMA_ClearFlag()
669 DMA2->IFCR = DMAy_IT; in DMA_ClearITPendingBit()
[all …]
/bsp/tkm32F499/Libraries/Hal_lib/src/
A DHAL_dma.c131 DMA1->IFCR |= DMA1_Channel1_IT_Mask; in DMA_DeInit()
136 DMA1->IFCR |= DMA1_Channel2_IT_Mask; in DMA_DeInit()
141 DMA1->IFCR |= DMA1_Channel3_IT_Mask; in DMA_DeInit()
146 DMA1->IFCR |= DMA1_Channel4_IT_Mask; in DMA_DeInit()
151 DMA1->IFCR |= DMA1_Channel5_IT_Mask; in DMA_DeInit()
156 DMA1->IFCR |= DMA1_Channel6_IT_Mask; in DMA_DeInit()
161 DMA1->IFCR |= DMA1_Channel7_IT_Mask; in DMA_DeInit()
532 DMA2->IFCR = DMAy_FLAG; in DMA_ClearFlag()
537 DMA1->IFCR = DMAy_FLAG; in DMA_ClearFlag()
693 DMA2->IFCR = DMAy_IT; in DMA_ClearITPendingBit()
[all …]
A DHAL_dma_bak.c128 DMA1->IFCR |= DMA1_Channel1_IT_Mask;
132 DMA1->IFCR |= DMA1_Channel2_IT_Mask;
136 DMA1->IFCR |= DMA1_Channel3_IT_Mask;
140 DMA1->IFCR |= DMA1_Channel4_IT_Mask;
144 DMA1->IFCR |= DMA1_Channel5_IT_Mask;
419 DMA1->IFCR = DMA_FLAG;
523 DMA1->IFCR = DMA_IT;
/bsp/hk32/libraries/HK32F0xx_StdPeriph_Driver/src/
A Dhk32f0xx_dma.c125 DMA1->IFCR |= DMA1_CHANNEL1_IT_MASK; in DMA_DeInit()
130 DMA1->IFCR |= DMA1_CHANNEL2_IT_MASK; in DMA_DeInit()
135 DMA1->IFCR |= DMA1_CHANNEL3_IT_MASK; in DMA_DeInit()
140 DMA1->IFCR |= DMA1_CHANNEL4_IT_MASK; in DMA_DeInit()
145 DMA1->IFCR |= DMA1_CHANNEL5_IT_MASK; in DMA_DeInit()
528 DMA1->IFCR = DMAy_FLAG; in DMA_ClearFlag()
638 DMA1->IFCR = DMA1_IT_TC1 | DMA1_IT_HT1 | DMA1_IT_TE1; in DMA_ClearITPendingBit()
641 DMA1->IFCR = DMA1_IT_TC2 | DMA1_IT_HT2 | DMA1_IT_TE2; in DMA_ClearITPendingBit()
644 DMA1->IFCR = DMA1_IT_TC3 | DMA1_IT_HT3 | DMA1_IT_TE3; in DMA_ClearITPendingBit()
647 DMA1->IFCR = DMA1_IT_TC4 | DMA1_IT_HT4 | DMA1_IT_TE4; in DMA_ClearITPendingBit()
[all …]
/bsp/mm32f327x/Libraries/MM32F327x/HAL_Lib/Src/
A Dhal_dma.c56 DMA2->IFCR |= (u32)0x0F << (((*(vu32*)&channel & (u32)0xff) - 8) / 5); in DMA_DeInit()
59 DMA1->IFCR |= (u32)0x0F << (((*(vu32*)&channel & (u32)0xff) - 8) / 5); in DMA_DeInit()
204 DMA2->IFCR = flag; in DMA_ClearFlag()
207 DMA1->IFCR = flag; in DMA_ClearFlag()
251 DMA2->IFCR = it; in DMA_ClearITPendingBit()
254 DMA1->IFCR = it; in DMA_ClearITPendingBit()
308 DMA2->IFCR |= (u32)0x0F << (((*(vu32*)&channel & (u32)0xff) - 8) / 5); in exDMA_ClearITPendingBit()
309 DMA2->IFCR = it; in exDMA_ClearITPendingBit()
312 DMA1->IFCR |= (u32)0x0F << (((*(vu32*)&channel & (u32)0xff) - 8) / 5); in exDMA_ClearITPendingBit()
313 DMA1->IFCR = it; in exDMA_ClearITPendingBit()
/bsp/mm32l3xx/Libraries/MM32L3xx/HAL_lib/src/
A DHAL_dma.c127 DMA1->IFCR |= DMA1_Channel1_IT_Mask; in DMA_DeInit()
131 DMA1->IFCR |= DMA1_Channel2_IT_Mask; in DMA_DeInit()
135 DMA1->IFCR |= DMA1_Channel3_IT_Mask; in DMA_DeInit()
139 DMA1->IFCR |= DMA1_Channel4_IT_Mask; in DMA_DeInit()
143 DMA1->IFCR |= DMA1_Channel5_IT_Mask; in DMA_DeInit()
147 DMA1->IFCR |= DMA1_Channel6_IT_Mask; in DMA_DeInit()
151 DMA1->IFCR |= DMA1_Channel7_IT_Mask; in DMA_DeInit()
425 DMA1->IFCR = DMA_FLAG; in DMA_ClearFlag()
529 DMA1->IFCR = DMA_IT; in DMA_ClearITPendingBit()
/bsp/mm32f103x/Libraries/MM32F103/HAL_lib/src/
A DHAL_dma.c127 DMA1->IFCR |= DMA1_Channel1_IT_Mask; in DMA_DeInit()
131 DMA1->IFCR |= DMA1_Channel2_IT_Mask; in DMA_DeInit()
135 DMA1->IFCR |= DMA1_Channel3_IT_Mask; in DMA_DeInit()
139 DMA1->IFCR |= DMA1_Channel4_IT_Mask; in DMA_DeInit()
143 DMA1->IFCR |= DMA1_Channel5_IT_Mask; in DMA_DeInit()
147 DMA1->IFCR |= DMA1_Channel6_IT_Mask; in DMA_DeInit()
151 DMA1->IFCR |= DMA1_Channel7_IT_Mask; in DMA_DeInit()
425 DMA1->IFCR = DMA_FLAG; in DMA_ClearFlag()
529 DMA1->IFCR = DMA_IT; in DMA_ClearITPendingBit()
/bsp/mm32l07x/Libraries/MM32L0xx/HAL_lib/src/
A DHAL_dma.c124 DMA1->IFCR |= DMA1_Channel1_IT_Mask; in DMA_DeInit()
128 DMA1->IFCR |= DMA1_Channel2_IT_Mask; in DMA_DeInit()
132 DMA1->IFCR |= DMA1_Channel3_IT_Mask; in DMA_DeInit()
136 DMA1->IFCR |= DMA1_Channel4_IT_Mask; in DMA_DeInit()
140 DMA1->IFCR |= DMA1_Channel5_IT_Mask; in DMA_DeInit()
415 DMA1->IFCR = DMA_FLAG; in DMA_ClearFlag()
519 DMA1->IFCR = DMA_IT; in DMA_ClearITPendingBit()
/bsp/stm32/libraries/STM32L1xx_HAL/STM32L1xx_HAL_Driver/Inc/
A Dstm32l1xx_ll_dma.h1478 SET_BIT(DMAx->IFCR, DMA_IFCR_CGIF1); in LL_DMA_ClearFlag_GI1()
1489 SET_BIT(DMAx->IFCR, DMA_IFCR_CGIF2); in LL_DMA_ClearFlag_GI2()
1500 SET_BIT(DMAx->IFCR, DMA_IFCR_CGIF3); in LL_DMA_ClearFlag_GI3()
1511 SET_BIT(DMAx->IFCR, DMA_IFCR_CGIF4); in LL_DMA_ClearFlag_GI4()
1522 SET_BIT(DMAx->IFCR, DMA_IFCR_CGIF5); in LL_DMA_ClearFlag_GI5()
1533 SET_BIT(DMAx->IFCR, DMA_IFCR_CGIF6); in LL_DMA_ClearFlag_GI6()
1544 SET_BIT(DMAx->IFCR, DMA_IFCR_CGIF7); in LL_DMA_ClearFlag_GI7()
1555 SET_BIT(DMAx->IFCR, DMA_IFCR_CTCIF1); in LL_DMA_ClearFlag_TC1()
1566 SET_BIT(DMAx->IFCR, DMA_IFCR_CTCIF2); in LL_DMA_ClearFlag_TC2()
1577 SET_BIT(DMAx->IFCR, DMA_IFCR_CTCIF3); in LL_DMA_ClearFlag_TC3()
[all …]
A Dstm32l1xx_hal_dma.h415 (DMA2->IFCR = (__FLAG__)) : (DMA1->IFCR = (__FLAG__)))
501 #define __HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__) (DMA1->IFCR = (__FLAG__))
/bsp/essemi/es32f0654/libraries/ES32F065x_ALD_StdPeriph_Driver/Source/
A Dald_tsense.c170 SET_BIT(TSENSE->IFCR, TSENSE_IFCR_TSENSE_MSK); in ald_tsense_get_value()
184 SET_BIT(TSENSE->IFCR, TSENSE_IFCR_TSENSE_MSK); in ald_tsense_get_value()
213 SET_BIT(TSENSE->IFCR, TSENSE_IFCR_TSENSE_MSK); in ald_tsense_get_value_by_it()
228 SET_BIT(TSENSE->IFCR, TSENSE_IFCR_TSENSE_MSK); in ald_tsense_irq_handler()
249 SET_BIT(TSENSE->IFCR, TSENSE_IFCR_TSENSE_MSK); in ald_tsense_irq_handler()
A Dald_trng.c254 WRITE_REG(hperh->perh->IFCR, flag); in ald_trng_clear_flag_status()
271 TRNG->IFCR = 0xFFFFFFFF; in trng_reset()
A Dald_rtc.c242 WRITE_REG(RTC->IFCR, ~0x0); in ald_rtc_reset()
1189 WRITE_REG(RTC->IFCR, flag); in ald_rtc_clear_flag_status()
/bsp/essemi/es32f369x/libraries/ES32F36xx_ALD_StdPeriph_Driver/Source/
A Dald_tsense.c172 SET_BIT(TSENSE->IFCR, TSENSE_IFCR_TSENSE_MSK); in ald_tsense_get_value()
186 SET_BIT(TSENSE->IFCR, TSENSE_IFCR_TSENSE_MSK); in ald_tsense_get_value()
215 SET_BIT(TSENSE->IFCR, TSENSE_IFCR_TSENSE_MSK); in ald_tsense_get_value_by_it()
230 SET_BIT(TSENSE->IFCR, TSENSE_IFCR_TSENSE_MSK); in ald_tsense_irq_handler()
252 SET_BIT(TSENSE->IFCR, TSENSE_IFCR_TSENSE_MSK); in ald_tsense_irq_handler()
A Dald_trng.c256 WRITE_REG(hperh->perh->IFCR, flag); in ald_trng_clear_flag_status()
273 TRNG->IFCR = 0xFFFFFFFF; in trng_reset()
A Dald_rtc.c242 WRITE_REG(RTC->IFCR, ~0x0); in ald_rtc_reset()
1189 WRITE_REG(RTC->IFCR, flag); in ald_rtc_clear_flag_status()
/bsp/ft32/libraries/FT32F0xx/FT32F0xx_Driver/Src/
A Dft32f0xx_dma.c79 DMA1->IFCR |= DMA1_CHANNEL1_IT_MASK; in DMA_DeInit()
84 DMA1->IFCR |= DMA1_CHANNEL2_IT_MASK; in DMA_DeInit()
89 DMA1->IFCR |= DMA1_CHANNEL3_IT_MASK; in DMA_DeInit()
94 DMA1->IFCR |= DMA1_CHANNEL4_IT_MASK; in DMA_DeInit()
99 DMA1->IFCR |= DMA1_CHANNEL5_IT_MASK; in DMA_DeInit()
480 DMA1->IFCR = DMAy_FLAG; in DMA_ClearFlag()
629 DMA1->IFCR = DMAy_IT; in DMA_ClearITPendingBit()
/bsp/stm32/libraries/STM32L1xx_HAL/STM32L1xx_HAL_Driver/Src/
A Dstm32l1xx_hal_dma.c262 hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU)); in HAL_DMA_DeInit()
435 hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU)); in HAL_DMA_Abort()
473 hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU)); in HAL_DMA_Abort_IT()
540 hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU)); in HAL_DMA_PollForTransfer()
575 hdma->DmaBaseAddress->IFCR = (DMA_FLAG_TC1 << (hdma->ChannelIndex& 0x1CU)); in HAL_DMA_PollForTransfer()
584 hdma->DmaBaseAddress->IFCR = (DMA_FLAG_HT1 << (hdma->ChannelIndex & 0x1CU)); in HAL_DMA_PollForTransfer()
614 hdma->DmaBaseAddress->IFCR = DMA_ISR_HTIF1 << (hdma->ChannelIndex & 0x1CU); in HAL_DMA_IRQHandler()
641 hdma->DmaBaseAddress->IFCR = (DMA_ISR_TCIF1 << (hdma->ChannelIndex & 0x1CU)); in HAL_DMA_IRQHandler()
662 hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU)); in HAL_DMA_IRQHandler()
866 hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU)); in DMA_SetConfig()
/bsp/stm32/stm32l475-atk-pandora/board/ports/
A Ddrv_sdio_adapter.c48 DMA2->IFCR = DMA_ISR_GIF1 << 4; in SD_LowLevel_DMA_TxConfig()
75 DMA2->IFCR = DMA_ISR_GIF1 << 4; in SD_LowLevel_DMA_RxConfig()
/bsp/mm32/libraries/MM32F3270_HAL/MM32F3270_HAL_Driver/Src/
A Dhal_dma.c70 DMAx->IFCR = ( (interrupts & 0xFu) << (channel * 4u) ); in DMA_ClearChannelInterruptStatus()
/bsp/stm32/stm32h750-fk750m1-vbt6/board/port/lcd/
A Ddrv_lcd_spi_ext.c204 SET_BIT((hspi)->Instance->IFCR, SPI_IFCR_SUSPC); // 清除挂起标志位 in SPI_Transmit_Ext()
321 SET_BIT((hspi)->Instance->IFCR, SPI_IFCR_SUSPC); // 清除挂起标志位 in SPI_TransmitBuffer_Ext()
/bsp/stm32/stm32f469-st-disco/applications/lvgl/
A Dlv_port_disp.c71 DMA2D->IFCR = DMA2D_FLAG_TC; in DMA2D_IRQHandler()
/bsp/mm32f327x/Libraries/MM32F327x/Include/
A Dreg_dma.h75 …__IO u32 IFCR; ///< Interrupt Flag Cl… member
/bsp/essemi/es32f0654/libraries/CMSIS/Device/EastSoft/ES32F065x/Include/
A Des32f065x.h2425 __O uint32_t IFCR; member
5543 __O uint32_t IFCR; member
5651 __IO uint32_t IFCR; member
/bsp/essemi/es32f369x/libraries/CMSIS/Device/EastSoft/ES32F36xx/Include/
A Des32f36xx.h3102 __O uint32_t IFCR; member
7052 __O uint32_t IFCR; member
7160 __IO uint32_t IFCR; member

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