Home
last modified time | relevance | path

Searched refs:INIT_CLK (Results 1 – 2 of 2) sorted by relevance

/bsp/rockchip/rk2108/board/common/
A Dboard_base.c41 INIT_CLK("SCLK_SHRM", SCLK_SHRM, 10 * MHZ),
42 INIT_CLK("PCLK_SHRM", PCLK_SHRM, 10 * MHZ),
43 INIT_CLK("PCLK_ALIVE", PCLK_ALIVE, 10 * MHZ),
44 INIT_CLK("HCLK_ALIVE", HCLK_ALIVE, 10 * MHZ),
45 INIT_CLK("HCLK_M4", HCLK_M4, 10 * MHZ),
46 INIT_CLK("ACLK_LOGIC", ACLK_LOGIC, 10 * MHZ),
47 INIT_CLK("HCLK_LOGIC", HCLK_LOGIC, 10 * MHZ),
51 INIT_CLK("PLL_GPLL", PLL_GPLL, 1188 * MHZ),
52 INIT_CLK("PLL_CPLL", PLL_CPLL, 1188 * MHZ),
54 INIT_CLK("HCLK_M4", HCLK_M4, 300 * MHZ),
[all …]
/bsp/rockchip/common/drivers/
A Ddrv_clock.h29 #define INIT_CLK(NAME, ID, RATE) \ macro

Completed in 11 milliseconds