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Searched refs:INTEN (Results 1 – 25 of 161) sorted by relevance

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/bsp/n32/libraries/N32L43x_Firmware_Library/n32l43x_std_periph_driver/src/
A Dn32l43x_lptim.c1018 SET_BIT(LPTIMx->INTEN, LPTIM_INTEN_CMPMIE); in LPTIM_EnableIT_CMPM()
1029 CLEAR_BIT(LPTIMx->INTEN, LPTIM_INTEN_CMPMIE); in LPTIM_DisableIT_CMPM()
1051 SET_BIT(LPTIMx->INTEN, LPTIM_INTEN_ARRMIE); in LPTIM_EnableIT_ARRM()
1062 CLEAR_BIT(LPTIMx->INTEN, LPTIM_INTEN_ARRMIE); in LPTIM_DisableIT_ARRM()
1084 SET_BIT(LPTIMx->INTEN, LPTIM_INTEN_EXTRIGIE); in LPTIM_EnableIT_EXTTRIG()
1117 SET_BIT(LPTIMx->INTEN, LPTIM_INTEN_CMPUPDIE); in LPTIM_EnableIT_CMPOK()
1150 SET_BIT(LPTIMx->INTEN, LPTIM_INTEN_ARRUPDIE); in LPTIM_EnableIT_ARROK()
1183 SET_BIT(LPTIMx->INTEN, LPTIM_INTEN_UPIE); in LPTIM_EnableIT_UP()
1194 CLEAR_BIT(LPTIMx->INTEN, LPTIM_INTEN_UPIE); in LPTIM_DisableIT_UP()
1216 SET_BIT(LPTIMx->INTEN, LPTIM_INTEN_DOWNIE); in LPTIM_EnableIT_DOWN()
[all …]
/bsp/n32/libraries/N32L40x_Firmware_Library/n32l40x_std_periph_driver/src/
A Dn32l40x_lptim.c1018 SET_BIT(LPTIMx->INTEN, LPTIM_INTEN_CMPMIE); in LPTIM_EnableIT_CMPM()
1029 CLEAR_BIT(LPTIMx->INTEN, LPTIM_INTEN_CMPMIE); in LPTIM_DisableIT_CMPM()
1051 SET_BIT(LPTIMx->INTEN, LPTIM_INTEN_ARRMIE); in LPTIM_EnableIT_ARRM()
1062 CLEAR_BIT(LPTIMx->INTEN, LPTIM_INTEN_ARRMIE); in LPTIM_DisableIT_ARRM()
1084 SET_BIT(LPTIMx->INTEN, LPTIM_INTEN_EXTRIGIE); in LPTIM_EnableIT_EXTTRIG()
1117 SET_BIT(LPTIMx->INTEN, LPTIM_INTEN_CMPUPDIE); in LPTIM_EnableIT_CMPOK()
1150 SET_BIT(LPTIMx->INTEN, LPTIM_INTEN_ARRUPDIE); in LPTIM_EnableIT_ARROK()
1183 SET_BIT(LPTIMx->INTEN, LPTIM_INTEN_UPIE); in LPTIM_EnableIT_UP()
1194 CLEAR_BIT(LPTIMx->INTEN, LPTIM_INTEN_UPIE); in LPTIM_DisableIT_UP()
1216 SET_BIT(LPTIMx->INTEN, LPTIM_INTEN_DOWNIE); in LPTIM_EnableIT_DOWN()
[all …]
/bsp/n32/libraries/N32G43x_Firmware_Library/n32g43x_std_periph_driver/src/
A Dn32g43x_lptim.c1018 SET_BIT(LPTIMx->INTEN, LPTIM_INTEN_CMPMIE); in LPTIM_EnableIT_CMPM()
1029 CLEAR_BIT(LPTIMx->INTEN, LPTIM_INTEN_CMPMIE); in LPTIM_DisableIT_CMPM()
1051 SET_BIT(LPTIMx->INTEN, LPTIM_INTEN_ARRMIE); in LPTIM_EnableIT_ARRM()
1062 CLEAR_BIT(LPTIMx->INTEN, LPTIM_INTEN_ARRMIE); in LPTIM_DisableIT_ARRM()
1084 SET_BIT(LPTIMx->INTEN, LPTIM_INTEN_EXTRIGIE); in LPTIM_EnableIT_EXTTRIG()
1117 SET_BIT(LPTIMx->INTEN, LPTIM_INTEN_CMPUPDIE); in LPTIM_EnableIT_CMPOK()
1150 SET_BIT(LPTIMx->INTEN, LPTIM_INTEN_ARRUPDIE); in LPTIM_EnableIT_ARROK()
1183 SET_BIT(LPTIMx->INTEN, LPTIM_INTEN_UPIE); in LPTIM_EnableIT_UP()
1194 CLEAR_BIT(LPTIMx->INTEN, LPTIM_INTEN_UPIE); in LPTIM_DisableIT_UP()
1216 SET_BIT(LPTIMx->INTEN, LPTIM_INTEN_DOWNIE); in LPTIM_EnableIT_DOWN()
[all …]
/bsp/n32/libraries/N32G4FR_Firmware_Library/n32g4fr_std_periph_driver/inc/
A Dn32g4fr_rtc.h267 #define IS_ALARM_MASK(INTEN) (((INTEN)&0x7F7F7F7F) == (uint32_t)RESET) argument
337 #define IS_RTC_ALARM_SUB_SECOND_MASK_MODE(INTEN) … argument
338 …(((INTEN) == RTC_SUBS_MASK_ALL) || ((INTEN) == RTC_SUBS_MASK_SS14_1) || ((INTEN) == RTC_SUBS_MASK_…
339 …|| ((INTEN) == RTC_SUBS_MASK_SS14_3) || ((INTEN) == RTC_SUBS_MASK_SS14_4) || ((INTEN) == RTC_SUBS_…
340 …|| ((INTEN) == RTC_SUBS_MASK_SS14_6) || ((INTEN) == RTC_SUBS_MASK_SS14_7) || ((INTEN) == RTC_SUBS_…
341 …|| ((INTEN) == RTC_SUBS_MASK_SS14_9) || ((INTEN) == RTC_SUBS_MASK_SS14_10) || ((INTEN) == RTC_SUBS…
342 …|| ((INTEN) == RTC_SUBS_MASK_SS14_12) || ((INTEN) == RTC_SUBS_MASK_SS14_13) || ((INTEN) == RTC_SUB…
343 || ((INTEN) == RTC_SUBS_MASK_NONE))
/bsp/n32/libraries/N32G45x_Firmware_Library/n32g45x_std_periph_driver/inc/
A Dn32g45x_rtc.h267 #define IS_ALARM_MASK(INTEN) (((INTEN)&0x7F7F7F7F) == (uint32_t)RESET) argument
337 #define IS_RTC_ALARM_SUB_SECOND_MASK_MODE(INTEN) … argument
338 …(((INTEN) == RTC_SUBS_MASK_ALL) || ((INTEN) == RTC_SUBS_MASK_SS14_1) || ((INTEN) == RTC_SUBS_MASK_…
339 …|| ((INTEN) == RTC_SUBS_MASK_SS14_3) || ((INTEN) == RTC_SUBS_MASK_SS14_4) || ((INTEN) == RTC_SUBS_…
340 …|| ((INTEN) == RTC_SUBS_MASK_SS14_6) || ((INTEN) == RTC_SUBS_MASK_SS14_7) || ((INTEN) == RTC_SUBS_…
341 …|| ((INTEN) == RTC_SUBS_MASK_SS14_9) || ((INTEN) == RTC_SUBS_MASK_SS14_10) || ((INTEN) == RTC_SUBS…
342 …|| ((INTEN) == RTC_SUBS_MASK_SS14_12) || ((INTEN) == RTC_SUBS_MASK_SS14_13) || ((INTEN) == RTC_SUB…
343 || ((INTEN) == RTC_SUBS_MASK_NONE))
/bsp/n32/libraries/N32WB452_Firmware_Library/n32wb452_std_periph_driver/inc/
A Dn32wb452_rtc.h267 #define IS_ALARM_MASK(INTEN) (((INTEN)&0x7F7F7F7F) == (uint32_t)RESET) argument
337 #define IS_RTC_ALARM_SUB_SECOND_MASK_MODE(INTEN) … argument
338 …(((INTEN) == RTC_SUBS_MASK_ALL) || ((INTEN) == RTC_SUBS_MASK_SS14_1) || ((INTEN) == RTC_SUBS_MASK_…
339 …|| ((INTEN) == RTC_SUBS_MASK_SS14_3) || ((INTEN) == RTC_SUBS_MASK_SS14_4) || ((INTEN) == RTC_SUBS_…
340 …|| ((INTEN) == RTC_SUBS_MASK_SS14_6) || ((INTEN) == RTC_SUBS_MASK_SS14_7) || ((INTEN) == RTC_SUBS_…
341 …|| ((INTEN) == RTC_SUBS_MASK_SS14_9) || ((INTEN) == RTC_SUBS_MASK_SS14_10) || ((INTEN) == RTC_SUBS…
342 …|| ((INTEN) == RTC_SUBS_MASK_SS14_12) || ((INTEN) == RTC_SUBS_MASK_SS14_13) || ((INTEN) == RTC_SUB…
343 || ((INTEN) == RTC_SUBS_MASK_NONE))
/bsp/n32g452xx/Libraries/N32_Std_Driver/n32g45x_std_periph_driver/inc/
A Dn32g45x_rtc.h267 #define IS_ALARM_MASK(INTEN) (((INTEN)&0x7F7F7F7F) == (uint32_t)RESET) argument
337 #define IS_RTC_ALARM_SUB_SECOND_MASK_MODE(INTEN) … argument
338 …(((INTEN) == RTC_SUBS_MASK_ALL) || ((INTEN) == RTC_SUBS_MASK_SS14_1) || ((INTEN) == RTC_SUBS_MASK_…
339 …|| ((INTEN) == RTC_SUBS_MASK_SS14_3) || ((INTEN) == RTC_SUBS_MASK_SS14_4) || ((INTEN) == RTC_SUBS_…
340 …|| ((INTEN) == RTC_SUBS_MASK_SS14_6) || ((INTEN) == RTC_SUBS_MASK_SS14_7) || ((INTEN) == RTC_SUBS_…
341 …|| ((INTEN) == RTC_SUBS_MASK_SS14_9) || ((INTEN) == RTC_SUBS_MASK_SS14_10) || ((INTEN) == RTC_SUBS…
342 …|| ((INTEN) == RTC_SUBS_MASK_SS14_12) || ((INTEN) == RTC_SUBS_MASK_SS14_13) || ((INTEN) == RTC_SUB…
343 || ((INTEN) == RTC_SUBS_MASK_NONE))
/bsp/n32/libraries/N32L43x_Firmware_Library/n32l43x_std_periph_driver/inc/
A Dn32l43x_rtc.h267 #define IS_ALARM_MASK(INTEN) (((INTEN)&0x7F7F7F7F) == (uint32_t)RESET) argument
337 #define IS_RTC_ALARM_SUB_SECOND_MASK_MODE(INTEN) … argument
338 …(((INTEN) == RTC_SUBS_MASK_ALL) || ((INTEN) == RTC_SUBS_MASK_SS14_1) || ((INTEN) == RTC_SUBS_MASK_…
339 …|| ((INTEN) == RTC_SUBS_MASK_SS14_3) || ((INTEN) == RTC_SUBS_MASK_SS14_4) || ((INTEN) == RTC_SUBS_…
340 …|| ((INTEN) == RTC_SUBS_MASK_SS14_6) || ((INTEN) == RTC_SUBS_MASK_SS14_7) || ((INTEN) == RTC_SUBS_…
341 …|| ((INTEN) == RTC_SUBS_MASK_SS14_9) || ((INTEN) == RTC_SUBS_MASK_SS14_10) || ((INTEN) == RTC_SUBS…
342 …|| ((INTEN) == RTC_SUBS_MASK_SS14_12) || ((INTEN) == RTC_SUBS_MASK_SS14_13) || ((INTEN) == RTC_SUB…
343 || ((INTEN) == RTC_SUBS_MASK_NONE))
/bsp/n32/libraries/N32L40x_Firmware_Library/n32l40x_std_periph_driver/inc/
A Dn32l40x_rtc.h267 #define IS_ALARM_MASK(INTEN) (((INTEN)&0x7F7F7F7F) == (uint32_t)RESET) argument
337 #define IS_RTC_ALARM_SUB_SECOND_MASK_MODE(INTEN) … argument
338 …(((INTEN) == RTC_SUBS_MASK_ALL) || ((INTEN) == RTC_SUBS_MASK_SS14_1) || ((INTEN) == RTC_SUBS_MASK_…
339 …|| ((INTEN) == RTC_SUBS_MASK_SS14_3) || ((INTEN) == RTC_SUBS_MASK_SS14_4) || ((INTEN) == RTC_SUBS_…
340 …|| ((INTEN) == RTC_SUBS_MASK_SS14_6) || ((INTEN) == RTC_SUBS_MASK_SS14_7) || ((INTEN) == RTC_SUBS_…
341 …|| ((INTEN) == RTC_SUBS_MASK_SS14_9) || ((INTEN) == RTC_SUBS_MASK_SS14_10) || ((INTEN) == RTC_SUBS…
342 …|| ((INTEN) == RTC_SUBS_MASK_SS14_12) || ((INTEN) == RTC_SUBS_MASK_SS14_13) || ((INTEN) == RTC_SUB…
343 || ((INTEN) == RTC_SUBS_MASK_NONE))
/bsp/n32/libraries/N32G43x_Firmware_Library/n32g43x_std_periph_driver/inc/
A Dn32g43x_rtc.h267 #define IS_ALARM_MASK(INTEN) (((INTEN)&0x7F7F7F7F) == (uint32_t)RESET) argument
337 #define IS_RTC_ALARM_SUB_SECOND_MASK_MODE(INTEN) … argument
338 …(((INTEN) == RTC_SUBS_MASK_ALL) || ((INTEN) == RTC_SUBS_MASK_SS14_1) || ((INTEN) == RTC_SUBS_MASK_…
339 …|| ((INTEN) == RTC_SUBS_MASK_SS14_3) || ((INTEN) == RTC_SUBS_MASK_SS14_4) || ((INTEN) == RTC_SUBS_…
340 …|| ((INTEN) == RTC_SUBS_MASK_SS14_6) || ((INTEN) == RTC_SUBS_MASK_SS14_7) || ((INTEN) == RTC_SUBS_…
341 …|| ((INTEN) == RTC_SUBS_MASK_SS14_9) || ((INTEN) == RTC_SUBS_MASK_SS14_10) || ((INTEN) == RTC_SUBS…
342 …|| ((INTEN) == RTC_SUBS_MASK_SS14_12) || ((INTEN) == RTC_SUBS_MASK_SS14_13) || ((INTEN) == RTC_SUB…
343 || ((INTEN) == RTC_SUBS_MASK_NONE))
/bsp/apollo2/libraries/drivers/hal/
A Dam_hal_wdt.c119 AM_REGn(WDT, 0, INTEN) |= AM_REG_WDT_INTEN_WDT_M; in am_hal_wdt_init()
127 AM_REGn(WDT, 0, INTEN) &= ~AM_REG_WDT_INTEN_WDT_M; in am_hal_wdt_init()
245 return u32RetVal & AM_REG(WDT, INTEN); in am_hal_wdt_int_status_get()
295 AM_REG(WDT, INTEN) |= AM_REG_WDT_INTSET_WDT_M; in am_hal_wdt_int_enable()
310 return AM_REG(WDT, INTEN); in am_hal_wdt_int_enable_get()
325 AM_REG(WDT, INTEN) &= ~AM_REG_WDT_INTSET_WDT_M; in am_hal_wdt_int_disable()
A Dam_hal_vcomp.c167 return u32RetVal & AM_REG(VCOMP, INTEN); in am_hal_vcomp_int_status_get()
238 AM_REG(VCOMP, INTEN) |= ui32Interrupt; in am_hal_vcomp_int_enable()
257 return AM_REG(VCOMP, INTEN); in am_hal_vcomp_int_enable_get()
279 AM_REG(VCOMP, INTEN) &= ~ui32Interrupt; in am_hal_vcomp_int_disable()
A Dam_hal_clkgen.c146 AM_REG(CLKGEN, INTEN) |= ui32Interrupt; in am_hal_clkgen_int_enable()
164 return AM_REG(CLKGEN, INTEN); in am_hal_clkgen_int_enable_get()
184 AM_REG(CLKGEN, INTEN) &= ~ui32Interrupt; in am_hal_clkgen_int_disable()
241 u32RetVal &= AM_REG(CLKGEN, INTEN); in am_hal_clkgen_int_status_get()
A Dam_hal_adc.c392 AM_REG(ADC, INTEN) |= ui32Interrupt; in am_hal_adc_int_enable()
410 return AM_REG(ADC, INTEN); in am_hal_adc_int_enable_get()
430 AM_REG(ADC, INTEN) &= ~ui32Interrupt; in am_hal_adc_int_disable()
492 uint32_t u32RetVal = AM_REG(ADC, INTEN); in am_hal_adc_int_status_get()
A Dam_hal_iom.c840 AM_REGn(IOMSTR, ui32Module, INTEN) = am_hal_iom_pwrsave[ui32Module].INTEN; in am_hal_iom_power_on_restore()
879 am_hal_iom_pwrsave[ui32Module].INTEN = AM_REGn(IOMSTR, ui32Module, INTEN); in am_hal_iom_power_off_save()
1847 AM_REGn(IOMSTR, ui32Module, INTEN) = 0; in am_hal_iom_spi_write_nq()
2032 AM_REGn(IOMSTR, ui32Module, INTEN) = 0; in am_hal_iom_spi_read_nq()
2235 AM_REGn(IOMSTR, ui32Module, INTEN) = 0; in am_hal_iom_spi_fullduplex_nq()
2601 ui32IntConfig = AM_REGn(IOMSTR, 4, INTEN); in am_hal_iom_spi_read_nb()
2602 AM_REGn(IOMSTR, 4, INTEN) = 0; in am_hal_iom_spi_read_nb()
2637 AM_REGn(IOMSTR, 4, INTEN) = ui32IntConfig; in am_hal_iom_spi_read_nb()
2830 AM_REGn(IOMSTR, ui32Module, INTEN) = 0; in am_hal_iom_i2c_write_nq()
3027 AM_REGn(IOMSTR, ui32Module, INTEN) = 0; in am_hal_iom_i2c_read_nq()
[all …]
/bsp/Vango/v85xxp/Libraries/VangoV85xxP_standard_peripheral/Source/
A Dlib_adc_tiny.c26 ANA->INTEN &= ~ANA_INTEN_INTEN13; in TADC_DeInit()
148 ANA->INTEN |= ANA_INTEN_INTEN13; in TADC_INTConfig()
150 ANA->INTEN &= ~ANA_INTEN_INTEN13; in TADC_INTConfig()
A Dlib_ana.c148 tmp = ANA->INTEN; in ANA_INTConfig()
157 ANA->INTEN = tmp; in ANA_INTConfig()
A Dlib_cmp.c56 ANA->INTEN &= ~CMP1_INTEN_Msk; in CMP_DeInit()
69 ANA->INTEN &= ~CMP2_INTEN_Msk; in CMP_DeInit()
513 ANA->INTEN &= ~ANA_INTEN_INTEN2; in CMP_INTConfig()
514 ANA->INTEN |= (NewState<<ANA_INTEN_INTEN2_Pos); in CMP_INTConfig()
518 ANA->INTEN &= ~ANA_INTEN_INTEN3; in CMP_INTConfig()
519 ANA->INTEN |= (NewState<<ANA_INTEN_INTEN3_Pos); in CMP_INTConfig()
/bsp/ti/c28x/libraries/HAL_Drivers/
A Ddrv_pwm.c289 epwm->ETSEL.bit.INTEN = 1; /* Enable INT */ in drv_pwm_enable_irq()
291 epwm->ETSEL.bit.INTEN = 0; /* Enable INT */ in drv_pwm_enable_irq()
403 EPwm1Regs.ETSEL.bit.INTEN = 1; /* Enable INT */ in c28x_hw_pwm_init()
410 EPwm1Regs.ETSEL.bit.INTEN = 0; /* Disable INT */ in c28x_hw_pwm_init()
438 EPwm2Regs.ETSEL.bit.INTEN = 1; /* Enable INT */ in c28x_hw_pwm_init()
445 EPwm2Regs.ETSEL.bit.INTEN = 0; /* Disable INT */ in c28x_hw_pwm_init()
473 EPwm3Regs.ETSEL.bit.INTEN = 1; /* Enable INT */ in c28x_hw_pwm_init()
480 EPwm3Regs.ETSEL.bit.INTEN = 0; /* Disable INT */ in c28x_hw_pwm_init()
508 EPwm4Regs.ETSEL.bit.INTEN = 1; /* Enable INT */ in c28x_hw_pwm_init()
515 EPwm4Regs.ETSEL.bit.INTEN = 0; /* Disable INT */ in c28x_hw_pwm_init()
/bsp/apm32/libraries/APM32F0xx_Library/APM32F0xx_StdPeriphDriver/src/
A Dapm32f0xx_cec.c263 CEC->INTEN |= (uint32_t)interrupt; in CEC_EnableInterrupt()
289 CEC->INTEN &= ~(uint32_t)interrupt; in CEC_DisableInterrupt()
378 intEnable = (CEC->INTEN & flag); in CEC_ReadIntFlag()
/bsp/hpmicro/libraries/hpm_sdk/drivers/inc/
A Dhpm_i2c_drv.h304 return ptr->INTEN; in i2c_get_irq_setting()
317 ptr->INTEN &= ~mask; in i2c_disable_irq()
330 ptr->INTEN |= mask; in i2c_enable_irq()
342 ptr->INTEN &= ~I2C_EVENT_BYTE_RECEIVED; in i2c_disable_auto_ack()
354 ptr->INTEN |= I2C_EVENT_BYTE_RECEIVED; in i2c_enable_auto_ack()
/bsp/Vango/v85xx/Libraries/VangoV85xx_standard_peripheral/Source/
A Dlib_ana.c124 tmp = ANA->INTEN; in ANA_INTConfig()
133 ANA->INTEN = tmp; in ANA_INTConfig()
/bsp/mm32/libraries/MM32F3270_HAL/MM32F3270_HAL_Driver/Src/
A Dhal_spi.c117 SPIx->INTEN |= interrupts; in SPI_EnableInterrupts()
121 SPIx->INTEN &= ~interrupts; in SPI_EnableInterrupts()
159 return SPIx->INTEN; in SPI_GetEnabledInterrupts()
/bsp/apm32/libraries/APM32F4xx_Library/APM32F4xx_StdPeriphDriver/src/
A Dapm32f4xx_rng.c100 RNG->CTRL_B.INTEN = BIT_SET; in EnableInterrupt()
112 RNG->CTRL_B.INTEN = BIT_RESET; in DisableInterrupt()
/bsp/synwit/libraries/SWM320_CSL/SWM320_StdPeriph_Driver/
A DSWM320_exti.c78 GPIOx->INTEN |= (0x01 << n); in EXTI_Open()
91 GPIOx->INTEN &= ~(0x01 << n); in EXTI_Close()

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