| /bsp/CME_M7/StdPeriph_Driver/src/ |
| A D | cmem7_uart.c | 100 UARTx->INT_MASK |= UART_Int_All; in UART_Init()
109 UARTx->INT_MASK &= ~Int; in UART_EnableInt()
111 UARTx->INT_MASK |= Int; in UART_EnableInt()
114 UARTx->INT_MASK &= UART_Int_All; in UART_EnableInt()
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| A D | cmem7_spi.c | 66 SPIx->INT_MASK &= ~Int; in SPI_EnableInt()
68 SPIx->INT_MASK |= Int; in SPI_EnableInt()
71 SPIx->INT_MASK &= SPI_INT_ALL; in SPI_EnableInt()
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| A D | cmem7_i2c.c | 96 I2Cx->INT_MASK = I2C_INNER_INT_ALL; in I2C_Init()
146 I2Cx->INT_MASK &= ~Int; in I2C_EnableInt()
148 I2Cx->INT_MASK |= Int; in I2C_EnableInt()
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| A D | cmem7_adc.c | 96 ADC->INT_MASK &= ~Int; in ADC_EnableInt()
98 ADC->INT_MASK |= Int; in ADC_EnableInt()
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| /bsp/n32/libraries/N32L43x_Firmware_Library/n32l43x_std_periph_driver/src/ |
| A D | n32l43x_lpuart.c | 62 #define INT_MASK ((uint16_t)0x007F) /*!< LPUART Interrupt Mask */ macro
480 itmask = (uint8_t)(LPUART_INT >> 0x08) & INT_MASK; in LPUART_GetIntStatus()
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| A D | n32l43x_usart.c | 93 #define INT_MASK ((uint16_t)0x001F) /*!< USART Interrupt Mask */ macro
385 itpos = USART_INT & INT_MASK; in USART_ConfigInt()
873 itmask = USART_INT & INT_MASK; in USART_GetIntStatus()
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| /bsp/n32/libraries/N32L40x_Firmware_Library/n32l40x_std_periph_driver/src/ |
| A D | n32l40x_lpuart.c | 62 #define INT_MASK ((uint16_t)0x007F) /*!< LPUART Interrupt Mask */ macro
480 itmask = (uint8_t)(LPUART_INT >> 0x08) & INT_MASK; in LPUART_GetIntStatus()
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| A D | n32l40x_usart.c | 93 #define INT_MASK ((uint16_t)0x001F) /*!< USART Interrupt Mask */ macro
385 itpos = USART_INT & INT_MASK; in USART_ConfigInt()
873 itmask = USART_INT & INT_MASK; in USART_GetIntStatus()
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| /bsp/n32/libraries/N32G43x_Firmware_Library/n32g43x_std_periph_driver/src/ |
| A D | n32g43x_lpuart.c | 62 #define INT_MASK ((uint16_t)0x007F) /*!< LPUART Interrupt Mask */ macro
480 itmask = (uint8_t)(LPUART_INT >> 0x08) & INT_MASK; in LPUART_GetIntStatus()
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| A D | n32g43x_usart.c | 93 #define INT_MASK ((uint16_t)0x001F) /*!< USART Interrupt Mask */ macro
385 itpos = USART_INT & INT_MASK; in USART_ConfigInt()
873 itmask = USART_INT & INT_MASK; in USART_GetIntStatus()
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| /bsp/k230/drivers/interdrv/gpio/ |
| A D | drv_gpio.h | 46 #define INT_MASK 0x34 macro
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| A D | drv_gpio.c | 267 kd_gpio_reg_writel(reg + INT_MASK, pin, 0x0); in debounce_work()
290 kd_gpio_reg_writel(reg + INT_MASK, pin_offset, 0x1); in pin_irq()
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| /bsp/n32/libraries/N32G4FR_Firmware_Library/n32g4fr_std_periph_driver/src/ |
| A D | n32g4fr_usart.c | 93 #define INT_MASK ((uint16_t)0x001F) /*!< USART Interrupt Mask */ macro
403 itpos = USART_INT & INT_MASK; in USART_ConfigInt()
891 itmask = USART_INT & INT_MASK; in USART_GetIntStatus()
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| /bsp/n32/libraries/N32G45x_Firmware_Library/n32g45x_std_periph_driver/src/ |
| A D | n32g45x_usart.c | 93 #define INT_MASK ((uint16_t)0x001F) /*!< USART Interrupt Mask */ macro
403 itpos = USART_INT & INT_MASK; in USART_ConfigInt()
891 itmask = USART_INT & INT_MASK; in USART_GetIntStatus()
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| /bsp/n32/libraries/N32WB452_Firmware_Library/n32wb452_std_periph_driver/src/ |
| A D | n32wb452_usart.c | 93 #define INT_MASK ((uint16_t)0x001F) /*!< USART Interrupt Mask */ macro
403 itpos = USART_INT & INT_MASK; in USART_ConfigInt()
891 itmask = USART_INT & INT_MASK; in USART_GetIntStatus()
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| /bsp/n32g452xx/Libraries/N32_Std_Driver/n32g45x_std_periph_driver/src/ |
| A D | n32g45x_usart.c | 93 #define INT_MASK ((uint16_t)0x001F) /*!< USART Interrupt Mask */ macro
398 itpos = USART_INT & INT_MASK; in USART_ConfigInt()
886 itmask = USART_INT & INT_MASK; in USART_GetIntStatus()
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| /bsp/CME_M7/StdPeriph_Driver/inc/ |
| A D | cmem7.h | 176 …__IO uint32_t INT_MASK; /*!< interrupt mask register … member
417 …__IO uint32_t INT_MASK; /*!< interrupt mask Register … member
571 …__IO uint32_t INT_MASK; /*!< I2C interrupt mask register … member
1048 …__IO uint32_t INT_MASK; /*!< interrupt mask register … member
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| /bsp/airm2m/air105/libraries/HAL_Driver/Inc/ |
| A D | air105.h | 354 __IO uint32_t INT_MASK; member
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| /bsp/rv32m1_vega/rv32m1_sdk_riscv/devices/RV32M1/ |
| A D | RV32M1_ri5cy.h | 4665 __IO uint32_t INT_MASK; /**< Interrupt Mask Register, offset: 0x14 */ member
19958 __IO uint32_t INT_MASK; /**< Mask Register, offset: 0xA8 */ member
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| A D | RV32M1_zero_riscy.h | 3935 __IO uint32_t INT_MASK; /**< Interrupt Mask Register, offset: 0x14 */ member
20785 __IO uint32_t INT_MASK; /**< Mask Register, offset: 0xA8 */ member
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