1 /* 2 * Copyright (c) 2021-2024 HPMicro 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 * 6 */ 7 8 9 #ifndef HPM_IOC_H 10 #define HPM_IOC_H 11 12 typedef struct { 13 struct { 14 __RW uint32_t FUNC_CTL; /* 0x0: ALT SELECT */ 15 __RW uint32_t PAD_CTL; /* 0x4: PAD SETTINGS */ 16 } PAD[488]; 17 } IOC_Type; 18 19 20 /* Bitfield definition for register of struct array PAD: FUNC_CTL */ 21 /* 22 * LOOP_BACK (RW) 23 * 24 * force input on 25 * 0: disable 26 * 1: enable 27 */ 28 #define IOC_PAD_FUNC_CTL_LOOP_BACK_MASK (0x10000UL) 29 #define IOC_PAD_FUNC_CTL_LOOP_BACK_SHIFT (16U) 30 #define IOC_PAD_FUNC_CTL_LOOP_BACK_SET(x) (((uint32_t)(x) << IOC_PAD_FUNC_CTL_LOOP_BACK_SHIFT) & IOC_PAD_FUNC_CTL_LOOP_BACK_MASK) 31 #define IOC_PAD_FUNC_CTL_LOOP_BACK_GET(x) (((uint32_t)(x) & IOC_PAD_FUNC_CTL_LOOP_BACK_MASK) >> IOC_PAD_FUNC_CTL_LOOP_BACK_SHIFT) 32 33 /* 34 * ANALOG (RW) 35 * 36 * select analog pin in pad 37 * 0: disable 38 * 1: enable 39 */ 40 #define IOC_PAD_FUNC_CTL_ANALOG_MASK (0x100U) 41 #define IOC_PAD_FUNC_CTL_ANALOG_SHIFT (8U) 42 #define IOC_PAD_FUNC_CTL_ANALOG_SET(x) (((uint32_t)(x) << IOC_PAD_FUNC_CTL_ANALOG_SHIFT) & IOC_PAD_FUNC_CTL_ANALOG_MASK) 43 #define IOC_PAD_FUNC_CTL_ANALOG_GET(x) (((uint32_t)(x) & IOC_PAD_FUNC_CTL_ANALOG_MASK) >> IOC_PAD_FUNC_CTL_ANALOG_SHIFT) 44 45 /* 46 * ALT_SELECT (RW) 47 * 48 * alt select 49 * 0: ALT0 50 * 1: ALT1 51 * ... 52 * 31:ALT31 53 */ 54 #define IOC_PAD_FUNC_CTL_ALT_SELECT_MASK (0x1FU) 55 #define IOC_PAD_FUNC_CTL_ALT_SELECT_SHIFT (0U) 56 #define IOC_PAD_FUNC_CTL_ALT_SELECT_SET(x) (((uint32_t)(x) << IOC_PAD_FUNC_CTL_ALT_SELECT_SHIFT) & IOC_PAD_FUNC_CTL_ALT_SELECT_MASK) 57 #define IOC_PAD_FUNC_CTL_ALT_SELECT_GET(x) (((uint32_t)(x) & IOC_PAD_FUNC_CTL_ALT_SELECT_MASK) >> IOC_PAD_FUNC_CTL_ALT_SELECT_SHIFT) 58 59 /* Bitfield definition for register of struct array PAD: PAD_CTL */ 60 /* 61 * HYS (RW) 62 * 63 * schmitt trigger enable 64 * 0: disable 65 * 1: enable 66 */ 67 #define IOC_PAD_PAD_CTL_HYS_MASK (0x1000000UL) 68 #define IOC_PAD_PAD_CTL_HYS_SHIFT (24U) 69 #define IOC_PAD_PAD_CTL_HYS_SET(x) (((uint32_t)(x) << IOC_PAD_PAD_CTL_HYS_SHIFT) & IOC_PAD_PAD_CTL_HYS_MASK) 70 #define IOC_PAD_PAD_CTL_HYS_GET(x) (((uint32_t)(x) & IOC_PAD_PAD_CTL_HYS_MASK) >> IOC_PAD_PAD_CTL_HYS_SHIFT) 71 72 /* 73 * PRS (RW) 74 * 75 * select pull up/down internal resistance strength: 76 * For pull down, only have 100 Kohm resistance 77 * For pull up: 78 * 00: 100 KOhm 79 * 01: 47 KOhm 80 * 10: 22 KOhm 81 * 11: 22 KOhm 82 */ 83 #define IOC_PAD_PAD_CTL_PRS_MASK (0x300000UL) 84 #define IOC_PAD_PAD_CTL_PRS_SHIFT (20U) 85 #define IOC_PAD_PAD_CTL_PRS_SET(x) (((uint32_t)(x) << IOC_PAD_PAD_CTL_PRS_SHIFT) & IOC_PAD_PAD_CTL_PRS_MASK) 86 #define IOC_PAD_PAD_CTL_PRS_GET(x) (((uint32_t)(x) & IOC_PAD_PAD_CTL_PRS_MASK) >> IOC_PAD_PAD_CTL_PRS_SHIFT) 87 88 /* 89 * PS (RW) 90 * 91 * pull select 92 * 0: pull down 93 * 1: pull up 94 */ 95 #define IOC_PAD_PAD_CTL_PS_MASK (0x40000UL) 96 #define IOC_PAD_PAD_CTL_PS_SHIFT (18U) 97 #define IOC_PAD_PAD_CTL_PS_SET(x) (((uint32_t)(x) << IOC_PAD_PAD_CTL_PS_SHIFT) & IOC_PAD_PAD_CTL_PS_MASK) 98 #define IOC_PAD_PAD_CTL_PS_GET(x) (((uint32_t)(x) & IOC_PAD_PAD_CTL_PS_MASK) >> IOC_PAD_PAD_CTL_PS_SHIFT) 99 100 /* 101 * PE (RW) 102 * 103 * pull enable 104 * 0: pull disable 105 * 1: pull enable 106 */ 107 #define IOC_PAD_PAD_CTL_PE_MASK (0x20000UL) 108 #define IOC_PAD_PAD_CTL_PE_SHIFT (17U) 109 #define IOC_PAD_PAD_CTL_PE_SET(x) (((uint32_t)(x) << IOC_PAD_PAD_CTL_PE_SHIFT) & IOC_PAD_PAD_CTL_PE_MASK) 110 #define IOC_PAD_PAD_CTL_PE_GET(x) (((uint32_t)(x) & IOC_PAD_PAD_CTL_PE_MASK) >> IOC_PAD_PAD_CTL_PE_SHIFT) 111 112 /* 113 * KE (RW) 114 * 115 * keeper capability enable 116 * 0: keeper disable 117 * 1: keeper enable 118 */ 119 #define IOC_PAD_PAD_CTL_KE_MASK (0x10000UL) 120 #define IOC_PAD_PAD_CTL_KE_SHIFT (16U) 121 #define IOC_PAD_PAD_CTL_KE_SET(x) (((uint32_t)(x) << IOC_PAD_PAD_CTL_KE_SHIFT) & IOC_PAD_PAD_CTL_KE_MASK) 122 #define IOC_PAD_PAD_CTL_KE_GET(x) (((uint32_t)(x) & IOC_PAD_PAD_CTL_KE_MASK) >> IOC_PAD_PAD_CTL_KE_SHIFT) 123 124 /* 125 * OD (RW) 126 * 127 * open drain 128 * 0: open drain disable 129 * 1: open drain enable 130 */ 131 #define IOC_PAD_PAD_CTL_OD_MASK (0x100U) 132 #define IOC_PAD_PAD_CTL_OD_SHIFT (8U) 133 #define IOC_PAD_PAD_CTL_OD_SET(x) (((uint32_t)(x) << IOC_PAD_PAD_CTL_OD_SHIFT) & IOC_PAD_PAD_CTL_OD_MASK) 134 #define IOC_PAD_PAD_CTL_OD_GET(x) (((uint32_t)(x) & IOC_PAD_PAD_CTL_OD_MASK) >> IOC_PAD_PAD_CTL_OD_SHIFT) 135 136 /* 137 * SR (RW) 138 * 139 * slew rate 140 * 0: Slow slew rate 141 * 1: Fast slew rate 142 */ 143 #define IOC_PAD_PAD_CTL_SR_MASK (0x40U) 144 #define IOC_PAD_PAD_CTL_SR_SHIFT (6U) 145 #define IOC_PAD_PAD_CTL_SR_SET(x) (((uint32_t)(x) << IOC_PAD_PAD_CTL_SR_SHIFT) & IOC_PAD_PAD_CTL_SR_MASK) 146 #define IOC_PAD_PAD_CTL_SR_GET(x) (((uint32_t)(x) & IOC_PAD_PAD_CTL_SR_MASK) >> IOC_PAD_PAD_CTL_SR_SHIFT) 147 148 /* 149 * SPD (RW) 150 * 151 * additional 2-bit slew rate to select IO cell operation frequency range with reduced switching noise 152 * 00: Slow frequency slew rate(50Mhz) 153 * 01: Medium frequency slew rate(100 Mhz) 154 * 10: Fast frequency slew rate(150 Mhz) 155 * 11: Max frequency slew rate(200Mhz) 156 */ 157 #define IOC_PAD_PAD_CTL_SPD_MASK (0x30U) 158 #define IOC_PAD_PAD_CTL_SPD_SHIFT (4U) 159 #define IOC_PAD_PAD_CTL_SPD_SET(x) (((uint32_t)(x) << IOC_PAD_PAD_CTL_SPD_SHIFT) & IOC_PAD_PAD_CTL_SPD_MASK) 160 #define IOC_PAD_PAD_CTL_SPD_GET(x) (((uint32_t)(x) & IOC_PAD_PAD_CTL_SPD_MASK) >> IOC_PAD_PAD_CTL_SPD_SHIFT) 161 162 /* 163 * DS (RW) 164 * 165 * drive strength 166 * 1.8V Mode: 167 * 000: 260 Ohm 168 * 001: 260 Ohm 169 * 010: 130 Ohm 170 * 011: 88 Ohm 171 * 100: 65 Ohm 172 * 101: 52 Ohm 173 * 110: 43 Ohm 174 * 111: 37 Ohm 175 * 3.3V Mode: 176 * 000: 157 Ohm 177 * 001: 157 Ohm 178 * 010: 78 Ohm 179 * 011: 53 Ohm 180 * 100: 39 Ohm 181 * 101: 32 Ohm 182 * 110: 26 Ohm 183 * 111: 23 Ohm 184 */ 185 #define IOC_PAD_PAD_CTL_DS_MASK (0x7U) 186 #define IOC_PAD_PAD_CTL_DS_SHIFT (0U) 187 #define IOC_PAD_PAD_CTL_DS_SET(x) (((uint32_t)(x) << IOC_PAD_PAD_CTL_DS_SHIFT) & IOC_PAD_PAD_CTL_DS_MASK) 188 #define IOC_PAD_PAD_CTL_DS_GET(x) (((uint32_t)(x) & IOC_PAD_PAD_CTL_DS_MASK) >> IOC_PAD_PAD_CTL_DS_SHIFT) 189 190 191 192 /* PAD register group index macro definition */ 193 #define IOC_PAD_PA00 (0UL) 194 #define IOC_PAD_PA01 (1UL) 195 #define IOC_PAD_PA02 (2UL) 196 #define IOC_PAD_PA03 (3UL) 197 #define IOC_PAD_PA04 (4UL) 198 #define IOC_PAD_PA05 (5UL) 199 #define IOC_PAD_PA06 (6UL) 200 #define IOC_PAD_PA07 (7UL) 201 #define IOC_PAD_PA08 (8UL) 202 #define IOC_PAD_PA09 (9UL) 203 #define IOC_PAD_PA10 (10UL) 204 #define IOC_PAD_PA11 (11UL) 205 #define IOC_PAD_PA12 (12UL) 206 #define IOC_PAD_PA13 (13UL) 207 #define IOC_PAD_PA14 (14UL) 208 #define IOC_PAD_PA15 (15UL) 209 #define IOC_PAD_PA16 (16UL) 210 #define IOC_PAD_PA17 (17UL) 211 #define IOC_PAD_PA18 (18UL) 212 #define IOC_PAD_PA19 (19UL) 213 #define IOC_PAD_PA20 (20UL) 214 #define IOC_PAD_PA21 (21UL) 215 #define IOC_PAD_PA22 (22UL) 216 #define IOC_PAD_PA23 (23UL) 217 #define IOC_PAD_PA24 (24UL) 218 #define IOC_PAD_PA25 (25UL) 219 #define IOC_PAD_PA26 (26UL) 220 #define IOC_PAD_PA27 (27UL) 221 #define IOC_PAD_PA28 (28UL) 222 #define IOC_PAD_PA29 (29UL) 223 #define IOC_PAD_PA30 (30UL) 224 #define IOC_PAD_PA31 (31UL) 225 #define IOC_PAD_PB00 (32UL) 226 #define IOC_PAD_PB01 (33UL) 227 #define IOC_PAD_PB02 (34UL) 228 #define IOC_PAD_PB03 (35UL) 229 #define IOC_PAD_PB04 (36UL) 230 #define IOC_PAD_PB05 (37UL) 231 #define IOC_PAD_PB06 (38UL) 232 #define IOC_PAD_PB07 (39UL) 233 #define IOC_PAD_PB08 (40UL) 234 #define IOC_PAD_PB09 (41UL) 235 #define IOC_PAD_PB10 (42UL) 236 #define IOC_PAD_PB11 (43UL) 237 #define IOC_PAD_PB12 (44UL) 238 #define IOC_PAD_PB13 (45UL) 239 #define IOC_PAD_PB14 (46UL) 240 #define IOC_PAD_PB15 (47UL) 241 #define IOC_PAD_PB16 (48UL) 242 #define IOC_PAD_PB17 (49UL) 243 #define IOC_PAD_PB18 (50UL) 244 #define IOC_PAD_PB19 (51UL) 245 #define IOC_PAD_PB20 (52UL) 246 #define IOC_PAD_PB21 (53UL) 247 #define IOC_PAD_PB22 (54UL) 248 #define IOC_PAD_PB23 (55UL) 249 #define IOC_PAD_PB24 (56UL) 250 #define IOC_PAD_PB25 (57UL) 251 #define IOC_PAD_PB26 (58UL) 252 #define IOC_PAD_PB27 (59UL) 253 #define IOC_PAD_PB28 (60UL) 254 #define IOC_PAD_PB29 (61UL) 255 #define IOC_PAD_PB30 (62UL) 256 #define IOC_PAD_PB31 (63UL) 257 #define IOC_PAD_PC00 (64UL) 258 #define IOC_PAD_PC01 (65UL) 259 #define IOC_PAD_PC02 (66UL) 260 #define IOC_PAD_PC03 (67UL) 261 #define IOC_PAD_PC04 (68UL) 262 #define IOC_PAD_PC05 (69UL) 263 #define IOC_PAD_PC06 (70UL) 264 #define IOC_PAD_PC07 (71UL) 265 #define IOC_PAD_PC08 (72UL) 266 #define IOC_PAD_PC09 (73UL) 267 #define IOC_PAD_PC10 (74UL) 268 #define IOC_PAD_PC11 (75UL) 269 #define IOC_PAD_PC12 (76UL) 270 #define IOC_PAD_PC13 (77UL) 271 #define IOC_PAD_PC14 (78UL) 272 #define IOC_PAD_PC15 (79UL) 273 #define IOC_PAD_PC16 (80UL) 274 #define IOC_PAD_PC17 (81UL) 275 #define IOC_PAD_PC18 (82UL) 276 #define IOC_PAD_PC19 (83UL) 277 #define IOC_PAD_PC20 (84UL) 278 #define IOC_PAD_PC21 (85UL) 279 #define IOC_PAD_PC22 (86UL) 280 #define IOC_PAD_PC23 (87UL) 281 #define IOC_PAD_PC24 (88UL) 282 #define IOC_PAD_PC25 (89UL) 283 #define IOC_PAD_PC26 (90UL) 284 #define IOC_PAD_PC27 (91UL) 285 #define IOC_PAD_PC28 (92UL) 286 #define IOC_PAD_PC29 (93UL) 287 #define IOC_PAD_PC30 (94UL) 288 #define IOC_PAD_PC31 (95UL) 289 #define IOC_PAD_PD00 (96UL) 290 #define IOC_PAD_PD01 (97UL) 291 #define IOC_PAD_PD02 (98UL) 292 #define IOC_PAD_PD03 (99UL) 293 #define IOC_PAD_PD04 (100UL) 294 #define IOC_PAD_PD05 (101UL) 295 #define IOC_PAD_PD06 (102UL) 296 #define IOC_PAD_PD07 (103UL) 297 #define IOC_PAD_PD08 (104UL) 298 #define IOC_PAD_PD09 (105UL) 299 #define IOC_PAD_PD10 (106UL) 300 #define IOC_PAD_PD11 (107UL) 301 #define IOC_PAD_PD12 (108UL) 302 #define IOC_PAD_PD13 (109UL) 303 #define IOC_PAD_PD14 (110UL) 304 #define IOC_PAD_PD15 (111UL) 305 #define IOC_PAD_PD16 (112UL) 306 #define IOC_PAD_PD17 (113UL) 307 #define IOC_PAD_PD18 (114UL) 308 #define IOC_PAD_PD19 (115UL) 309 #define IOC_PAD_PD20 (116UL) 310 #define IOC_PAD_PD21 (117UL) 311 #define IOC_PAD_PD22 (118UL) 312 #define IOC_PAD_PD23 (119UL) 313 #define IOC_PAD_PD24 (120UL) 314 #define IOC_PAD_PD25 (121UL) 315 #define IOC_PAD_PD26 (122UL) 316 #define IOC_PAD_PD27 (123UL) 317 #define IOC_PAD_PD28 (124UL) 318 #define IOC_PAD_PD29 (125UL) 319 #define IOC_PAD_PD30 (126UL) 320 #define IOC_PAD_PD31 (127UL) 321 #define IOC_PAD_PE00 (128UL) 322 #define IOC_PAD_PE01 (129UL) 323 #define IOC_PAD_PE02 (130UL) 324 #define IOC_PAD_PE03 (131UL) 325 #define IOC_PAD_PE04 (132UL) 326 #define IOC_PAD_PE05 (133UL) 327 #define IOC_PAD_PE06 (134UL) 328 #define IOC_PAD_PE07 (135UL) 329 #define IOC_PAD_PE08 (136UL) 330 #define IOC_PAD_PE09 (137UL) 331 #define IOC_PAD_PE10 (138UL) 332 #define IOC_PAD_PE11 (139UL) 333 #define IOC_PAD_PE12 (140UL) 334 #define IOC_PAD_PE13 (141UL) 335 #define IOC_PAD_PE14 (142UL) 336 #define IOC_PAD_PE15 (143UL) 337 #define IOC_PAD_PE16 (144UL) 338 #define IOC_PAD_PE17 (145UL) 339 #define IOC_PAD_PE18 (146UL) 340 #define IOC_PAD_PE19 (147UL) 341 #define IOC_PAD_PE20 (148UL) 342 #define IOC_PAD_PE21 (149UL) 343 #define IOC_PAD_PE22 (150UL) 344 #define IOC_PAD_PE23 (151UL) 345 #define IOC_PAD_PE24 (152UL) 346 #define IOC_PAD_PE25 (153UL) 347 #define IOC_PAD_PE26 (154UL) 348 #define IOC_PAD_PE27 (155UL) 349 #define IOC_PAD_PE28 (156UL) 350 #define IOC_PAD_PE29 (157UL) 351 #define IOC_PAD_PE30 (158UL) 352 #define IOC_PAD_PE31 (159UL) 353 #define IOC_PAD_PF00 (160UL) 354 #define IOC_PAD_PF01 (161UL) 355 #define IOC_PAD_PF02 (162UL) 356 #define IOC_PAD_PF03 (163UL) 357 #define IOC_PAD_PF04 (164UL) 358 #define IOC_PAD_PF05 (165UL) 359 #define IOC_PAD_PF06 (166UL) 360 #define IOC_PAD_PF07 (167UL) 361 #define IOC_PAD_PF08 (168UL) 362 #define IOC_PAD_PF09 (169UL) 363 #define IOC_PAD_PF10 (170UL) 364 #define IOC_PAD_PF11 (171UL) 365 #define IOC_PAD_PF12 (172UL) 366 #define IOC_PAD_PF13 (173UL) 367 #define IOC_PAD_PF14 (174UL) 368 #define IOC_PAD_PF15 (175UL) 369 #define IOC_PAD_PF16 (176UL) 370 #define IOC_PAD_PF17 (177UL) 371 #define IOC_PAD_PF18 (178UL) 372 #define IOC_PAD_PF19 (179UL) 373 #define IOC_PAD_PF20 (180UL) 374 #define IOC_PAD_PF21 (181UL) 375 #define IOC_PAD_PF22 (182UL) 376 #define IOC_PAD_PF23 (183UL) 377 #define IOC_PAD_PF24 (184UL) 378 #define IOC_PAD_PF25 (185UL) 379 #define IOC_PAD_PF26 (186UL) 380 #define IOC_PAD_PF27 (187UL) 381 #define IOC_PAD_PF28 (188UL) 382 #define IOC_PAD_PF29 (189UL) 383 #define IOC_PAD_PF30 (190UL) 384 #define IOC_PAD_PF31 (191UL) 385 #define IOC_PAD_PV00 (352UL) 386 #define IOC_PAD_PV01 (353UL) 387 #define IOC_PAD_PV02 (354UL) 388 #define IOC_PAD_PV03 (355UL) 389 #define IOC_PAD_PV04 (356UL) 390 #define IOC_PAD_PV05 (357UL) 391 #define IOC_PAD_PV06 (358UL) 392 #define IOC_PAD_PV07 (359UL) 393 #define IOC_PAD_PV08 (360UL) 394 #define IOC_PAD_PV09 (361UL) 395 #define IOC_PAD_PV10 (362UL) 396 #define IOC_PAD_PV11 (363UL) 397 #define IOC_PAD_PV12 (364UL) 398 #define IOC_PAD_PV13 (365UL) 399 #define IOC_PAD_PV14 (366UL) 400 #define IOC_PAD_PV15 (367UL) 401 #define IOC_PAD_PW00 (384UL) 402 #define IOC_PAD_PW01 (385UL) 403 #define IOC_PAD_PW02 (386UL) 404 #define IOC_PAD_PW03 (387UL) 405 #define IOC_PAD_PW04 (388UL) 406 #define IOC_PAD_PW05 (389UL) 407 #define IOC_PAD_PW06 (390UL) 408 #define IOC_PAD_PW07 (391UL) 409 #define IOC_PAD_PW08 (392UL) 410 #define IOC_PAD_PW09 (393UL) 411 #define IOC_PAD_PW10 (394UL) 412 #define IOC_PAD_PW11 (395UL) 413 #define IOC_PAD_PW12 (396UL) 414 #define IOC_PAD_PW13 (397UL) 415 #define IOC_PAD_PW14 (398UL) 416 #define IOC_PAD_PW15 (399UL) 417 #define IOC_PAD_PW16 (400UL) 418 #define IOC_PAD_PW17 (401UL) 419 #define IOC_PAD_PW18 (402UL) 420 #define IOC_PAD_PW19 (403UL) 421 #define IOC_PAD_PW20 (404UL) 422 #define IOC_PAD_PW21 (405UL) 423 #define IOC_PAD_PW22 (406UL) 424 #define IOC_PAD_PW23 (407UL) 425 #define IOC_PAD_PX00 (416UL) 426 #define IOC_PAD_PX01 (417UL) 427 #define IOC_PAD_PX02 (418UL) 428 #define IOC_PAD_PX03 (419UL) 429 #define IOC_PAD_PX04 (420UL) 430 #define IOC_PAD_PX05 (421UL) 431 #define IOC_PAD_PX06 (422UL) 432 #define IOC_PAD_PX07 (423UL) 433 #define IOC_PAD_PY00 (448UL) 434 #define IOC_PAD_PY01 (449UL) 435 #define IOC_PAD_PY02 (450UL) 436 #define IOC_PAD_PY03 (451UL) 437 #define IOC_PAD_PY04 (452UL) 438 #define IOC_PAD_PY05 (453UL) 439 #define IOC_PAD_PY06 (454UL) 440 #define IOC_PAD_PY07 (455UL) 441 #define IOC_PAD_PZ00 (480UL) 442 #define IOC_PAD_PZ01 (481UL) 443 #define IOC_PAD_PZ02 (482UL) 444 #define IOC_PAD_PZ03 (483UL) 445 #define IOC_PAD_PZ04 (484UL) 446 #define IOC_PAD_PZ05 (485UL) 447 #define IOC_PAD_PZ06 (486UL) 448 #define IOC_PAD_PZ07 (487UL) 449 450 451 #endif /* HPM_IOC_H */ 452