1 //########################################################################### 2 // 3 // FILE: F2837xD_Ipc_drivers.h 4 // 5 // TITLE: Defines and Macros for the IPC Controller 6 // 7 //########################################################################### 8 // $TI Release: F2837xD Support Library v3.05.00.00 $ 9 // $Release Date: Tue Jun 26 03:15:23 CDT 2018 $ 10 // $Copyright: 11 // Copyright (C) 2013-2018 Texas Instruments Incorporated - http://www.ti.com/ 12 // 13 // Redistribution and use in source and binary forms, with or without 14 // modification, are permitted provided that the following conditions 15 // are met: 16 // 17 // Redistributions of source code must retain the above copyright 18 // notice, this list of conditions and the following disclaimer. 19 // 20 // Redistributions in binary form must reproduce the above copyright 21 // notice, this list of conditions and the following disclaimer in the 22 // documentation and/or other materials provided with the 23 // distribution. 24 // 25 // Neither the name of Texas Instruments Incorporated nor the names of 26 // its contributors may be used to endorse or promote products derived 27 // from this software without specific prior written permission. 28 // 29 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 30 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 31 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 32 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 33 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 34 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 35 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 36 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 37 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 38 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 39 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 40 // $ 41 //########################################################################### 42 43 // 44 //! \addtogroup ipc_driver_api 45 //! @{ 46 // 47 48 #ifndef F2837xD_IPC_DRIVERS_H 49 #define F2837xD_IPC_DRIVERS_H 50 51 // 52 // If building with a C++ compiler, make all of the definitions in this header 53 // have a C binding. 54 // 55 #ifdef __cplusplus 56 extern "C" { 57 #endif 58 59 // 60 // Included Files 61 // 62 #include "F2837xD_device.h" 63 64 // 65 // Defines 66 // 67 68 // 69 // The following are values that are used to define the maximum size of the 70 // global circular buffer variables g_asIPCCPU1toCPU2Buffers and 71 // g_asIPCCPU2toCPU1Buffers. They are also used in the IpcPut() and IpcGet() 72 // functions. IPC_BUFFER_SIZE and NUM_IPC_INTERRUPTS are user-configurable. 73 // 74 #define IPC_BUFFER_SIZE 4 // # of tIpcMessage messages in 75 // circular buffer 76 // (must be interval of 2) 77 #define NUM_IPC_INTERRUPTS 4 // # of IPC interrupts using circular 78 // buffer 79 // (must be same number on both CPUs 80 #define MAX_BUFFER_INDEX IPC_BUFFER_SIZE - 1 81 82 // 83 // The following are values that can be passed to IPCInitialize() 84 // as the usCPU1IpcInterrupt and usCPU2IpcInterrupt parameters 85 // 86 #define IPC_INT0 0x0001 87 #define IPC_INT1 0x0002 88 #define IPC_INT2 0x0003 89 #define IPC_INT3 0x0004 90 91 // 92 // The following are values that are returned from all of the IPCCtoM command 93 // functions to determine whether the command was successfully sent or not. 94 // 95 #define STATUS_FAIL 0x0001 96 #define STATUS_PASS 0x0000 97 98 // 99 // The following are values that can be passed to IPCReqMemAccess() as 100 // usMaster parameter to determine which processor to give master access to 101 // GSx blocks. 102 // 103 #define IPC_GSX_CPU1_MASTER 0x0001 104 #define IPC_GSX_CPU2_MASTER 0x0000 105 106 // 107 // The following are values that can be passed to all IPC CPU1 to CPU2 or 108 // CPU2 to CPU1 command functions as bBlock parameter to determine whether to 109 // wait/block until a slot in PutBuffer is available if it is full, or to exit 110 // with a failure status. 111 // 112 #define ENABLE_BLOCKING 0x0001 113 #define DISABLE_BLOCKING 0x0000 114 115 // 116 // The following are values that can be passed to IPCCtoMDataRead(), 117 // IPCCCtoMSetBits(),IPCCCtoMSetBits_Protected(), IPCCCtoMClearBits(), 118 // IPCCCtoMClearBits_Protected(), IPCCCtoMDataWrite(), 119 // IPCCtoMDataWrite_Protected() 120 // as usLength parameter to determine whether command applies to 16- or 32-bit 121 // data word. 122 // 123 #define IPC_LENGTH_16_BITS 0x00000001 124 #define IPC_LENGTH_32_BITS 0x00000002 125 126 // 127 // The following are values that can be passed to IPCReqMemAccess() as 128 // ulMask parameter to configure GSxMSEL_REG register for master access to Sx 129 // RAM block. 130 // 131 #define GS0_ACCESS 0x00000001 // Master Access to GS0 132 #define GS1_ACCESS 0x00000002 // Master Access to GS1 133 #define GS2_ACCESS 0x00000004 // Master Access to GS2 134 #define GS3_ACCESS 0x00000008 // Master Access to GS3 135 #define GS4_ACCESS 0x00000010 // Master Access to GS4 136 #define GS5_ACCESS 0x00000020 // Master Access to GS5 137 #define GS6_ACCESS 0x00000040 // Master Access to GS6 138 #define GS7_ACCESS 0x00000080 // Master Access to GS7 139 #define GS8_ACCESS 0x00000100 // Master Access to GS8 140 #define GS9_ACCESS 0x00000200 // Master Access to GS9 141 #define GS10_ACCESS 0x00000400 // Master Access to GS10 142 #define GS11_ACCESS 0x00000800 // Master Access to GS11 143 #define GS12_ACCESS 0x00001000 // Master Access to GS12 144 #define GS13_ACCESS 0x00002000 // Master Access to GS13 145 #define GS14_ACCESS 0x00004000 // Master Access to GS14 146 #define GS15_ACCESS 0x00008000 // Master Access to GS15 147 148 // 149 // The following are values that can be passed to IPCCtoMTaskBusy() as the 150 // ulFlags parameter. 151 // IPC_FLAG17 - IPC_FLAG32 can also be passed to IPCtoMDataRead() and 152 // IPCCtoMReadBlock() as the ulResponseFlag parameter. 153 // 154 #define NO_FLAG 0x00000000 // NO FLAG 155 #define IPC_FLAG0 0x00000001 // IPC FLAG 0 156 #define IPC_FLAG1 0x00000002 // IPC FLAG 1 157 #define IPC_FLAG2 0x00000004 // IPC FLAG 2 158 #define IPC_FLAG3 0x00000008 // IPC FLAG 3 159 #define IPC_FLAG4 0x00000010 // IPC FLAG 4 160 #define IPC_FLAG5 0x00000020 // IPC FLAG 5 161 #define IPC_FLAG6 0x00000040 // IPC FLAG 6 162 #define IPC_FLAG7 0x00000080 // IPC FLAG 7 163 #define IPC_FLAG8 0x00000100 // IPC FLAG 8 164 #define IPC_FLAG9 0x00000200 // IPC FLAG 9 165 #define IPC_FLAG10 0x00000400 // IPC FLAG 10 166 #define IPC_FLAG11 0x00000800 // IPC FLAG 11 167 #define IPC_FLAG12 0x00001000 // IPC FLAG 12 168 #define IPC_FLAG13 0x00002000 // IPC FLAG 13 169 #define IPC_FLAG14 0x00004000 // IPC FLAG 14 170 #define IPC_FLAG15 0x00008000 // IPC FLAG 15 171 #define IPC_FLAG16 0x00010000 // IPC FLAG 16 172 #define IPC_FLAG17 0x00020000 // IPC FLAG 17 173 #define IPC_FLAG18 0x00040000 // IPC FLAG 18 174 #define IPC_FLAG19 0x00080000 // IPC FLAG 19 175 #define IPC_FLAG20 0x00100000 // IPC FLAG 20 176 #define IPC_FLAG21 0x00200000 // IPC FLAG 21 177 #define IPC_FLAG22 0x00400000 // IPC FLAG 22 178 #define IPC_FLAG23 0x00800000 // IPC FLAG 23 179 #define IPC_FLAG24 0x01000000 // IPC FLAG 24 180 #define IPC_FLAG25 0x02000000 // IPC FLAG 25 181 #define IPC_FLAG26 0x04000000 // IPC FLAG 26 182 #define IPC_FLAG27 0x08000000 // IPC FLAG 27 183 #define IPC_FLAG28 0x10000000 // IPC FLAG 28 184 #define IPC_FLAG29 0x20000000 // IPC FLAG 29 185 #define IPC_FLAG30 0x40000000 // IPC FLAG 30 186 #define IPC_FLAG31 0x80000000 // IPC FLAG 31 187 188 // 189 // The following are values that are used by all command functions and passed 190 // between processors in tIpcMessage.ulmessage or in the xTOyIPCCOM register 191 // to determine what command is requested by the sending processor. 192 // 193 #define IPC_SET_BITS_16 0x00000001 // Used for IPC-Lite 194 #define IPC_SET_BITS_32 0x00000002 // Used for IPC-Lite 195 #define IPC_CLEAR_BITS_16 0x00000003 // Used for IPC-Lite 196 #define IPC_CLEAR_BITS_32 0x00000004 // Used for IPC-Lite 197 #define IPC_DATA_WRITE_16 0x00000005 // Used for IPC-Lite 198 #define IPC_DATA_WRITE_32 0x00000006 // Used for IPC-Lite 199 #define IPC_DATA_READ_16 0x00000007 // Used for Boot ROM 200 #define IPC_DATA_READ_32 0x00000008 // Used for Boot ROM 201 #define IPC_DATA_READ 0x00000008 202 #define IPC_SET_BITS_16_PROTECTED 0x00000009 // Used for IPC-Lite 203 #define IPC_SET_BITS_32_PROTECTED 0x0000000A // Used for IPC-Lite 204 #define IPC_CLEAR_BITS_16_PROTECTED 0x0000000B // Used for IPC-Lite 205 #define IPC_CLEAR_BITS_32_PROTECTED 0x0000000C // Used for IPC-Lite 206 #define IPC_DATA_WRITE_16_PROTECTED 0x0000000D // Used for IPC-Lite 207 #define IPC_DATA_WRITE_32_PROTECTED 0x0000000E // Used for IPC-Lite 208 209 // 210 // 0x0000000F and 0x0000010 are reserved by boot ROM 211 // 212 213 #define IPC_BRANCH 0x00000011 214 #define IPC_FUNC_CALL 0x00000012 215 #define IPC_MTOC_EXECUTE_BOOTMODE_CMD 0x00000013 216 217 #define IPC_SET_BITS 0x00010001 218 #define IPC_CLEAR_BITS 0x00010002 219 #define IPC_DATA_WRITE 0x00010003 220 #define IPC_BLOCK_READ 0x00010004 221 #define IPC_BLOCK_WRITE 0x00010005 222 #define IPC_DATA_READ_PROTECTED 0x00010007 223 #define IPC_SET_BITS_PROTECTED 0x00010008 224 #define IPC_CLEAR_BITS_PROTECTED 0x00010009 225 #define IPC_DATA_WRITE_PROTECTED 0x0001000A 226 #define IPC_BLOCK_WRITE_PROTECTED 0x0001000B 227 228 // 229 // The following are values that can be passed into the 230 // IPCBootControlSystem() function in the ulBootMode parameter. 231 // 232 #define BROM_IPC_EXECUTE_BOOTMODE_CMD 0x00000013 233 234 // 235 // Below are the values programmed into IPCBOOTMODE register 236 // 237 #define C1C2_BROM_BOOTMODE_BOOT_FROM_PARALLEL 0x00000000 238 #define C1C2_BROM_BOOTMODE_BOOT_FROM_SCI 0x00000001 239 #define C1C2_BROM_BOOTMODE_BOOT_FROM_SPI 0x00000004 240 #define C1C2_BROM_BOOTMODE_BOOT_FROM_I2C 0x00000005 241 #define C1C2_BROM_BOOTMODE_BOOT_FROM_CAN 0x00000007 242 #define C1C2_BROM_BOOTMODE_BOOT_FROM_RAM 0x0000000A 243 #define C1C2_BROM_BOOTMODE_BOOT_FROM_FLASH 0x0000000B 244 245 // 246 // The following value is used by the 247 // IPCBootControlSystem() function to limit the allowed boot mode values. 248 // 249 #define C1C2_BROM_BOOTMODE_BOOT_COMMAND_MAX_SUPPORT_VALUE 0x0000000C 250 251 // 252 // The following values report on the CPU02 boot ROM status at all times while 253 // the CPU02 is booting, and will reside in IPCBOOTSTS[11:0]. 254 // 255 256 // 257 // CPU02 has not filled in a valid value yet 258 // 259 #define C2_BOOTROM_BOOTSTS_C2TOC1_IGNORE 0x00000000 260 261 // 262 // CPU02 has started to boot, but not completed 263 // the boot process yet 264 // 265 #define C2_BOOTROM_BOOTSTS_SYSTEM_START_BOOT 0x00000001 266 267 // 268 // CPU02 has completed the boot and is ready for 269 // CPU01 TO CPU02 IPC commands 270 // 271 #define C2_BOOTROM_BOOTSTS_SYSTEM_READY 0x00000002 272 273 // 274 // CPU02 ACKs the command in CPU01 TO CPU01 275 // BOOTMODE register 276 // 277 #define C2_BOOTROM_BOOTSTS_C2TOC1_BOOT_CMD_ACK 0x00000003 278 279 // 280 // CPU02 un-supported command in CPU01 TO CPU01 281 // BOOTMODE register 282 // 283 #define C2_BOOTROM_BOOTSTS_C2TOC1_BOOT_CMD_NAK_STATUS_NOT_SUPPORTED 0x00000004 284 285 // 286 // CPU2 NAKs the current boot command in 287 // CPU01 TO CPU01 BOOTMODE register 288 // 289 #define C2_BOOTROM_BOOTSTS_C2TOC1_BOOT_CMD_NAK_STATUS_BUSY_WITH_BOOT 0x00000005 290 291 // 292 //! A structure that defines an IPC message. These fields are used by the 293 //! IPC drivers to determine handling of data passed between processors. 294 //! Although they have a defined naming scheme, they can also be used 295 //! generically 296 //! to pass 32-bit data words between processors. 297 // 298 typedef struct 299 { 300 //! The command passed between processor systems. 301 uint32_t ulcommand; 302 303 //! The receiving processor address the command is requesting action on. 304 uint32_t uladdress; 305 306 //! A 32-bit variable, the usage of which is determined by ulcommand. 307 //! The most common usage is to pass length requirements 308 //! with the upper 16-bits storing a Response Flag for read commands. 309 uint32_t uldataw1; 310 311 //! A 32-bit variable, the usage of which is determined by ulcommand. 312 //! For block transfers, this variable is generally the address in 313 //! shared memory used to pass data between processors. 314 uint32_t uldataw2; 315 316 } tIpcMessage; 317 318 // 319 //! A structure that defines an IPC control instance. These 320 //! fields are used by the IPC drivers, and normally it is not necessary for 321 //! user software to directly read or write fields in the table. 322 // 323 typedef struct 324 { 325 //! The address of the PutBuffer IPC message (in MSGRAM) 326 tIpcMessage *psPutBuffer; 327 328 //! The IPC INT flag to set when sending messages 329 //! for this IPC controller instance. 330 uint32_t ulPutFlag; 331 332 //! The address of the PutBuffer Write index (in MSGRAM) 333 uint16_t *pusPutWriteIndex; 334 335 //! The address of the PutBuffer Read index (in MSGRAM) 336 uint16_t *pusPutReadIndex; 337 338 //! The address of the GetBuffer IPC message(in MSGRAM) 339 tIpcMessage *psGetBuffer; 340 341 //! The address of the GetBuffer Write Index (in MSGRAM) 342 uint16_t *pusGetWriteIndex; 343 344 //! The address of the GetBuffer Read Index (in MSGRAM) 345 uint16_t *pusGetReadIndex; 346 347 } tIpcController; 348 349 // 350 // A type definition for the IPC function call command. 351 // 352 typedef uint32_t (*tfIpcFuncCall)(uint32_t ulParam); 353 354 // 355 // Prototypes for Circular Buffers 356 // 357 extern tIpcMessage g_asIPCCPU1toCPU2Buffers[NUM_IPC_INTERRUPTS][IPC_BUFFER_SIZE]; 358 extern tIpcMessage g_asIPCCPU2toCPU1Buffers[NUM_IPC_INTERRUPTS][IPC_BUFFER_SIZE]; 359 360 // 361 // Function Prototypes 362 // 363 extern void IPCInitialize (volatile tIpcController *psController, 364 uint16_t usCPU2IpcInterrupt, 365 uint16_t usCPU1IpcInterrupt); 366 extern uint16_t IpcPut (volatile tIpcController *psController, 367 tIpcMessage *psMessage, 368 uint16_t bBlock); 369 extern uint16_t IpcGet (volatile tIpcController *psController, 370 tIpcMessage *psMessage, 371 uint16_t bBlock); 372 extern uint16_t IPCLtoRDataRead (volatile tIpcController *psController, 373 uint32_t ulAddress, void *pvData, 374 uint16_t usLength, uint16_t bBlock, 375 uint32_t ulResponseFlag); 376 extern uint16_t IPCLtoRDataRead_Protected (volatile tIpcController *psController, 377 uint32_t ulAddress, void *pvData, 378 uint16_t usLength, uint16_t bBlock, 379 uint32_t ulResponseFlag); 380 extern uint16_t IPCLtoRSetBits(volatile tIpcController *psController, 381 uint32_t ulAddress, uint32_t ulMask, 382 uint16_t usLength,uint16_t bBlock); 383 extern uint16_t IPCLtoRSetBits_Protected(volatile tIpcController *psController, 384 uint32_t ulAddress, uint32_t ulMask, 385 uint16_t usLength, uint16_t bBlock); 386 extern uint16_t IPCLtoRClearBits(volatile tIpcController *psController, 387 uint32_t ulAddress, uint32_t ulMask, 388 uint16_t usLength,uint16_t bBlock); 389 extern uint16_t IPCLtoRClearBits_Protected(volatile tIpcController *psController, 390 uint32_t ulAddress, uint32_t ulMask, 391 uint16_t usLength, uint16_t bBlock); 392 extern uint16_t IPCLtoRDataWrite(volatile tIpcController *psController, 393 uint32_t ulAddress, uint32_t ulData, 394 uint16_t usLength, uint16_t bBlock, 395 uint32_t ulResponseFlag); 396 extern uint16_t IPCLtoRDataWrite_Protected(volatile tIpcController *psController, 397 uint32_t ulAddress, uint32_t ulData, 398 uint16_t usLength, uint16_t bBlock, 399 uint32_t ulResponseFlag); 400 extern uint16_t IPCLtoRBlockRead(volatile tIpcController *psController, 401 uint32_t ulAddress, uint32_t ulShareAddress, 402 uint16_t usLength, uint16_t bBlock, 403 uint32_t ulResponseFlag); 404 extern uint16_t IPCLtoRBlockWrite(volatile tIpcController *psController, 405 uint32_t ulAddress, uint32_t ulShareAddress, 406 uint16_t usLength, uint16_t usWordLength, 407 uint16_t bBlock); 408 extern uint16_t IPCLtoRBlockWrite_Protected(volatile tIpcController *psController, 409 uint32_t ulAddress, 410 uint32_t ulShareAddress, 411 uint16_t usLength, 412 uint16_t usWordLength, 413 uint16_t bBlock); 414 extern uint16_t IPCLtoRFunctionCall(volatile tIpcController *psController, 415 uint32_t ulAddress, uint32_t ulParam, 416 uint16_t bBlock); 417 extern uint16_t IPCLtoRSendMessage(volatile tIpcController *psController, 418 uint32_t ulCommand, uint32_t ulAddress, 419 uint32_t ulDataW1, uint32_t ulDataW2, 420 uint16_t bBlock); 421 #if defined (CPU2) 422 uint16_t 423 IPCReqMemAccess (volatile tIpcController *psController, uint32_t ulMask, 424 uint16_t usMaster, uint16_t bBlock); 425 #endif 426 427 extern void IPCRtoLDataWrite(tIpcMessage *psMessage); 428 extern void IPCRtoLDataWrite_Protected(tIpcMessage *psMessage); 429 extern void IPCRtoLDataRead(volatile tIpcController *psController, 430 tIpcMessage *psMessage, uint16_t bBlock); 431 extern void IPCRtoLDataRead_Protected(volatile tIpcController *psController, 432 tIpcMessage *psMessage,uint16_t bBlock); 433 extern void IPCRtoLSetBits(tIpcMessage *psMessage); 434 extern void IPCRtoLSetBits_Protected(tIpcMessage *psMessage); 435 extern void IPCRtoLClearBits(tIpcMessage *psMessage); 436 extern void IPCRtoLClearBits_Protected(tIpcMessage *psMessage); 437 extern void IPCRtoLBlockRead(tIpcMessage *psMessage); 438 extern void IPCRtoLBlockWrite(tIpcMessage *psMessage); 439 extern void IPCRtoLBlockWrite_Protected(tIpcMessage *psMessage); 440 extern void IPCRtoLFunctionCall(tIpcMessage *psMessage); 441 442 // 443 // IPC Lite Driver Prototype Definitions 444 // 445 extern uint16_t IPCLiteLtoRGetResult (void *pvData, uint16_t usLength, 446 uint32_t ulStatusFlag); 447 extern uint16_t IPCLiteLtoRDataRead(uint32_t ulFlag, uint32_t ulAddress, 448 uint16_t usLength, uint32_t ulStatusFlag); 449 extern uint16_t IPCLiteLtoRSetBits(uint32_t ulFlag, uint32_t ulAddress, 450 uint32_t ulMask, uint16_t usLength, 451 uint32_t ulStatusFlag); 452 extern uint16_t IPCLiteLtoRSetBits_Protected (uint32_t ulFlag, 453 uint32_t ulAddress, 454 uint32_t ulMask, 455 uint16_t usLength, 456 uint32_t ulStatusFlag); 457 extern uint16_t IPCLiteLtoRClearBits(uint32_t ulFlag, uint32_t ulAddress, 458 uint32_t ulMask, uint16_t usLength, 459 uint32_t ulStatusFlag); 460 extern uint16_t IPCLiteLtoRClearBits_Protected (uint32_t ulFlag, 461 uint32_t ulAddress, 462 uint32_t ulMask, 463 uint16_t usLength, 464 uint32_t ulStatusFlag); 465 extern uint16_t IPCLiteLtoRDataWrite(uint32_t ulFlag, uint32_t ulAddress, 466 uint32_t ulData, uint16_t usLength, 467 uint32_t ulStatusFlag); 468 extern uint16_t IPCLiteLtoRDataWrite_Protected(uint32_t ulFlag, 469 uint32_t ulAddress, 470 uint32_t ulData, 471 uint16_t usLength, 472 uint32_t ulStatusFlag); 473 extern uint16_t IPCLiteLtoRFunctionCall(uint32_t ulFlag, uint32_t ulAddress, 474 uint32_t ulParam, uint32_t ulStatusFlag); 475 extern uint16_t IPCLiteReqMemAccess (uint32_t ulFlag, uint32_t ulMask, 476 uint16_t ulMaster, uint32_t ulStatusFlag); 477 extern void IPCLiteRtoLDataRead(uint32_t ulFlag, uint32_t ulStatusFlag); 478 extern void IPCLiteRtoLSetBits(uint32_t ulFlag, uint32_t ulStatusFlag); 479 extern void IPCLiteRtoLSetBits_Protected (uint32_t ulFlag, uint32_t ulStatusFlag); 480 extern void IPCLiteRtoLClearBits(uint32_t ulFlag, uint32_t ulStatusFlag); 481 extern void IPCLiteRtoLClearBits_Protected (uint32_t ulFlag, 482 uint32_t ulStatusFlag); 483 extern void IPCLiteRtoLDataWrite(uint32_t ulFlag, uint32_t ulStatusFlag); 484 extern void IPCLiteRtoLDataWrite_Protected(uint32_t ulFlag, 485 uint32_t ulStatusFlag); 486 extern void IPCLiteRtoLFunctionCall(uint32_t ulFlag, uint32_t ulStatusFlag); 487 488 // 489 // IPC Utility Driver Prototype Definitions 490 // 491 extern void IPCRtoLFlagAcknowledge (uint32_t ulFlags); 492 extern Uint16 IPCRtoLFlagBusy (uint32_t ulFlags); 493 extern Uint16 IPCLtoRFlagBusy (uint32_t ulFlags); 494 extern void IPCLtoRFlagSet (uint32_t ulFlags); 495 extern void IPCLtoRFlagClear (uint32_t ulFlags); 496 extern uint32_t IPCGetBootStatus (void); 497 extern uint16_t IPCBootCPU2(uint32_t ulBootMode); 498 #ifdef __cplusplus 499 } 500 #endif /* extern "C" */ 501 502 // 503 // Close the Doxygen group. 504 //! @} 505 // 506 507 #endif // end of F2837xD_IPC_DRIVERS_H definition 508 509 // 510 // End of file 511 // 512