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Searched refs:ISPR (Results 1 – 25 of 634) sorted by relevance

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/bsp/microchip/samc21/bsp/hri/
A Dhri_nvic_c21.h144 ((Nvic *)hw)->ISPR.reg |= mask; in hri_nvic_set_ISPR_reg()
151 tmp = ((Nvic *)hw)->ISPR.reg; in hri_nvic_get_ISPR_reg()
159 ((Nvic *)hw)->ISPR.reg = data; in hri_nvic_write_ISPR_reg()
166 ((Nvic *)hw)->ISPR.reg &= ~mask; in hri_nvic_clear_ISPR_reg()
173 ((Nvic *)hw)->ISPR.reg ^= mask; in hri_nvic_toggle_ISPR_reg()
179 return ((Nvic *)hw)->ISPR.reg; in hri_nvic_read_ISPR_reg()
/bsp/samd21/sam_d2x_asflib/sam0/drivers/system/interrupt/
A Dsystem_interrupt.c67 result = ((NVIC->ISPR[0] & (1 << vector)) != 0); in system_interrupt_is_pending()
100 NVIC->ISPR[0] = (1 << vector); in system_interrupt_set_pending()
/bsp/fujitsu/mb9x/mb9bf568r/CMSIS/Include/
A Dcore_cm0.h273 …__IO uint32_t ISPR[1]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register … member
530 return((uint32_t) ((NVIC->ISPR[0] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); in NVIC_GetPendingIRQ()
543 NVIC->ISPR[0] = (1 << ((uint32_t)(IRQn) & 0x1F)); in NVIC_SetPendingIRQ()
/bsp/efm32/Libraries/CMSIS/Include/
A Dcore_cm0.h271 …__IO uint32_t ISPR[1]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register … member
530 return((uint32_t) ((NVIC->ISPR[0] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); in NVIC_GetPendingIRQ()
542 NVIC->ISPR[0] = (1 << ((uint32_t)(IRQn) & 0x1F)); in NVIC_SetPendingIRQ()
A Dcore_cm0plus.h282 …__IO uint32_t ISPR[1]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register … member
641 return((uint32_t) ((NVIC->ISPR[0] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); in NVIC_GetPendingIRQ()
653 NVIC->ISPR[0] = (1 << ((uint32_t)(IRQn) & 0x1F)); in NVIC_SetPendingIRQ()
/bsp/CME_M7/CMSIS/CMSIS/Include/
A Dcore_cm0.h286 …__IO uint32_t ISPR[1]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register … member
545 return((uint32_t) ((NVIC->ISPR[0] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); in NVIC_GetPendingIRQ()
557 NVIC->ISPR[0] = (1 << ((uint32_t)(IRQn) & 0x1F)); in NVIC_SetPendingIRQ()
A Dcore_sc000.h292 …__IO uint32_t ISPR[1]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register … member
676 return((uint32_t) ((NVIC->ISPR[0] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); in NVIC_GetPendingIRQ()
688 NVIC->ISPR[0] = (1 << ((uint32_t)(IRQn) & 0x1F)); in NVIC_SetPendingIRQ()
/bsp/fujitsu/mb9x/mb9bf618s/CMSIS/Include/
A Dcore_cm0.h286 …__IO uint32_t ISPR[1]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register … member
545 return((uint32_t) ((NVIC->ISPR[0] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); in NVIC_GetPendingIRQ()
557 NVIC->ISPR[0] = (1 << ((uint32_t)(IRQn) & 0x1F)); in NVIC_SetPendingIRQ()
A Dcore_sc000.h292 …__IO uint32_t ISPR[1]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register … member
676 return((uint32_t) ((NVIC->ISPR[0] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); in NVIC_GetPendingIRQ()
688 NVIC->ISPR[0] = (1 << ((uint32_t)(IRQn) & 0x1F)); in NVIC_SetPendingIRQ()
/bsp/mm32l07x/Libraries/CMSIS/CORE/
A Dcore_cm0.h271 …__IO uint32_t ISPR[1]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register … member
530 return((uint32_t) ((NVIC->ISPR[0] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); in NVIC_GetPendingIRQ()
542 NVIC->ISPR[0] = (1 << ((uint32_t)(IRQn) & 0x1F)); in NVIC_SetPendingIRQ()
/bsp/mm32l3xx/Libraries/CMSIS/KEIL_CORE/
A Dcore_cm0.h271 …__IO uint32_t ISPR[1]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register … member
530 return((uint32_t) ((NVIC->ISPR[0] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); in NVIC_GetPendingIRQ()
542 NVIC->ISPR[0] = (1 << ((uint32_t)(IRQn) & 0x1F)); in NVIC_SetPendingIRQ()
/bsp/hk32/libraries/HK32F0xx_StdPeriph_Driver/CMSIS/Core/
A Dcore_cm0.h286 …__IO uint32_t ISPR[1]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register … member
545 return((uint32_t) ((NVIC->ISPR[0] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); in NVIC_GetPendingIRQ()
557 NVIC->ISPR[0] = (1 << ((uint32_t)(IRQn) & 0x1F)); in NVIC_SetPendingIRQ()
/bsp/nxp/lpc/lpc43xx/Libraries/CMSIS/Include/
A Dcore_cm0.h286 …__IO uint32_t ISPR[1]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register … member
545 return((uint32_t) ((NVIC->ISPR[0] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); in NVIC_GetPendingIRQ()
557 NVIC->ISPR[0] = (1 << ((uint32_t)(IRQn) & 0x1F)); in NVIC_SetPendingIRQ()
/bsp/mm32f103x/Libraries/CMSIS/KEIL_CORE/
A Dcore_cm0.h262 …__IO uint32_t ISPR[1]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register … member
519 return((uint32_t) ((NVIC->ISPR[0] & (1 << ((uint32_t)(IRQn) & 0x1F))) ? 1 : 0)); in NVIC_GetPendingIRQ()
531 NVIC->ISPR[0] = (1 << ((uint32_t)(IRQn) & 0x1F)); in NVIC_SetPendingIRQ()
/bsp/xplorer4330/Libraries/CMSIS/Include/
A Dcore_cm0.h286 …__IO uint32_t ISPR[1]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register … member
545 return((uint32_t) ((NVIC->ISPR[0] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); in NVIC_GetPendingIRQ()
557 NVIC->ISPR[0] = (1 << ((uint32_t)(IRQn) & 0x1F)); in NVIC_SetPendingIRQ()
/bsp/essemi/es32f0654/libraries/CMSIS/Include/
A Dcore_cm0.h272 …__IO uint32_t ISPR[1]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register … member
531 return((uint32_t) ((NVIC->ISPR[0] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); in NVIC_GetPendingIRQ()
543 NVIC->ISPR[0] = (1 << ((uint32_t)(IRQn) & 0x1F)); in NVIC_SetPendingIRQ()
/bsp/synwit/libraries/SWM320_CSL/CMSIS/CoreSupport/
A Dcore_cm0.h315 …__IO uint32_t ISPR[1]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register … member
574 return((uint32_t) ((NVIC->ISPR[0] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); in NVIC_GetPendingIRQ()
586 NVIC->ISPR[0] = (1 << ((uint32_t)(IRQn) & 0x1F)); in NVIC_SetPendingIRQ()
A Dcore_cm0plus.h326 …__IO uint32_t ISPR[1]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register … member
685 return((uint32_t) ((NVIC->ISPR[0] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); in NVIC_GetPendingIRQ()
697 NVIC->ISPR[0] = (1 << ((uint32_t)(IRQn) & 0x1F)); in NVIC_SetPendingIRQ()
/bsp/ft32/libraries/FT32F0xx/CMSIS/FT32F0xx/Include/
A Dcore_cm0.h306 …__IO uint32_t ISPR[1]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register … member
565 return((uint32_t) ((NVIC->ISPR[0] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); in NVIC_GetPendingIRQ()
577 NVIC->ISPR[0] = (1 << ((uint32_t)(IRQn) & 0x1F)); in NVIC_SetPendingIRQ()
A Dcore_cm0plus.h317 …__IO uint32_t ISPR[1]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register … member
676 return((uint32_t) ((NVIC->ISPR[0] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); in NVIC_GetPendingIRQ()
688 NVIC->ISPR[0] = (1 << ((uint32_t)(IRQn) & 0x1F)); in NVIC_SetPendingIRQ()
/bsp/samd21/sam_d2x_asflib/CMSIS/Include/
A Dcore_cm0.h315 …__IO uint32_t ISPR[1]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register … member
574 return((uint32_t) ((NVIC->ISPR[0] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); in NVIC_GetPendingIRQ()
586 NVIC->ISPR[0] = (1 << ((uint32_t)(IRQn) & 0x1F)); in NVIC_SetPendingIRQ()
/bsp/mm32l07x/Libraries/CMSIS/IAR_CORE/
A Dcore_cm0.h315 …__IO uint32_t ISPR[1]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register … member
574 return((uint32_t) ((NVIC->ISPR[0] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); in NVIC_GetPendingIRQ()
586 NVIC->ISPR[0] = (1 << ((uint32_t)(IRQn) & 0x1F)); in NVIC_SetPendingIRQ()
/bsp/mm32l3xx/Libraries/CMSIS/IAR_CORE/
A Dcore_cm0.h315 …__IO uint32_t ISPR[1]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register … member
574 return((uint32_t) ((NVIC->ISPR[0] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); in NVIC_GetPendingIRQ()
586 NVIC->ISPR[0] = (1 << ((uint32_t)(IRQn) & 0x1F)); in NVIC_SetPendingIRQ()
/bsp/mm32f103x/Libraries/CMSIS/IAR_CORE/
A Dcore_cm0.h306 …__IO uint32_t ISPR[1]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register … member
563 return((uint32_t) ((NVIC->ISPR[0] & (1 << ((uint32_t)(IRQn) & 0x1F))) ? 1 : 0)); in NVIC_GetPendingIRQ()
575 NVIC->ISPR[0] = (1 << ((uint32_t)(IRQn) & 0x1F)); in NVIC_SetPendingIRQ()
/bsp/wch/arm/ch579m/libraries/CMSIS/Include/
A Dcore_cm0.h315 …__IO uint32_t ISPR[1]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register … member
574 return((uint32_t) ((NVIC->ISPR[0] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); in NVIC_GetPendingIRQ()
586 NVIC->ISPR[0] = (1 << ((uint32_t)(IRQn) & 0x1F)); in NVIC_SetPendingIRQ()

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