| /bsp/microchip/samc21/bsp/hri/ |
| A D | hri_mtb_c21.h | 467 ((Mtb *)hw)->ITCTRL.reg |= mask; in hri_mtb_set_ITCTRL_reg()
474 tmp = ((Mtb *)hw)->ITCTRL.reg; in hri_mtb_get_ITCTRL_reg()
482 ((Mtb *)hw)->ITCTRL.reg = data; in hri_mtb_write_ITCTRL_reg()
489 ((Mtb *)hw)->ITCTRL.reg &= ~mask; in hri_mtb_clear_ITCTRL_reg()
496 ((Mtb *)hw)->ITCTRL.reg ^= mask; in hri_mtb_toggle_ITCTRL_reg()
502 return ((Mtb *)hw)->ITCTRL.reg; in hri_mtb_read_ITCTRL_reg()
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| /bsp/apollo2/libraries/drivers/hal/ |
| A D | am_hal_tpiu.c | 310 AM_REG(TPIU, ITCTRL) = AM_REG_TPIU_ITCTRL_MODE_NORMAL; in am_hal_tpiu_enable()
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| /bsp/samd21/sam_d2x_asflib/sam0/utils/cmsis/samd21/include/component/ |
| A D | mtb.h | 367 …__IO MTB_ITCTRL_Type ITCTRL; /**< \brief Offset: 0xF00 (R/W 32) MTB Integration Mod… member
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| /bsp/microchip/samc21/bsp/samc21/include/component/ |
| A D | mtb.h | 353 …__IO MTB_ITCTRL_Type ITCTRL; /**< \brief Offset: 0xF00 (R/W 32) MTB Integration Mod… member
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| /bsp/renesas/ra4e2-eco/ra/arm/CMSIS_6/CMSIS/Core/Include/ |
| A D | core_cm33.h | 1053 …__IOM uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control Register… member
1290 __IOM uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */ member
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| A D | core_cm35p.h | 1053 …__IOM uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control Register… member
1290 __IOM uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */ member
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| /bsp/renesas/ra6e2-fpb/ra/arm/CMSIS_6/CMSIS/Core/Include/ |
| A D | core_cm33.h | 1053 …__IOM uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control Register… member
1290 __IOM uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */ member
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| A D | core_cm35p.h | 1053 …__IOM uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control Register… member
1290 __IOM uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */ member
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| /bsp/efm32/Libraries/CMSIS/Include/ |
| A D | core_cm3.h | 890 __IO uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */ member
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| /bsp/fujitsu/mb9x/mb9bf506r/libraries/CMSIS/Include/ |
| A D | core_cm3.h | 890 __IO uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */ member
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| /bsp/fujitsu/mb9x/mb9bf618s/CMSIS/Include/ |
| A D | core_cm3.h | 905 __IO uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */ member
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| A D | core_sc300.h | 876 __IO uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */ member
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| /bsp/CME_M7/CMSIS/CMSIS/Include/ |
| A D | core_sc300.h | 876 __IO uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */ member
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| A D | core_cm3.h | 905 __IO uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */ member
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| /bsp/samd21/sam_d2x_asflib/CMSIS/Include/ |
| A D | core_cm3.h | 925 __IO uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */ member
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| A D | core_sc300.h | 905 __IO uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */ member
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| /bsp/maxim/libraries/MAX32660PeriphDriver/CMSIS/Core/Include/ |
| A D | core_cm3.h | 905 __IO uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */ member
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| /bsp/mm32l07x/Libraries/CMSIS/CORE/ |
| A D | core_cm3.h | 905 __IO uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */ member
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| A D | core_sc300.h | 876 __IO uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */ member
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| /bsp/synwit/libraries/SWM320_CSL/CMSIS/CoreSupport/ |
| A D | core_cm3.h | 925 __IO uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */ member
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| /bsp/mm32l07x/Libraries/CMSIS/IAR_CORE/ |
| A D | core_cm3.h | 925 __IO uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */ member
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| A D | core_sc300.h | 905 __IO uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */ member
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| /bsp/mm32l3xx/Libraries/CMSIS/IAR_CORE/ |
| A D | core_cm3.h | 925 __IO uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */ member
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| A D | core_sc300.h | 905 __IO uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */ member
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| /bsp/mm32l3xx/Libraries/CMSIS/KEIL_CORE/ |
| A D | core_cm3.h | 905 __IO uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */ member
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