| /bsp/apollo2/libraries/drivers/hal/ |
| A D | am_hal_itm.c | 138 while ( AM_REG(ITM, TCR) & AM_REG_ITM_TCR_BUSY(1) ); in am_hal_itm_disable()
145 AM_REG(ITM, TCR) &= ~AM_REG_ITM_TCR_ITM_ENABLE(1); in am_hal_itm_disable()
146 while ( AM_REG(ITM, TCR) & (AM_REG_ITM_TCR_ITM_ENABLE(1) | AM_REG_ITM_TCR_BUSY(1)) ); in am_hal_itm_disable()
178 while (AM_REG(ITM, TCR) & AM_REG_ITM_TCR_BUSY(1)); in am_hal_itm_not_busy()
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| /bsp/efm32/EFM32_Gxxx_DK/ |
| A D | trace.c | 85 ITM->LAR = 0xC5ACCE55; in TRACE_SWOSetup()
86 ITM->TCR = 0x10009; in TRACE_SWOSetup()
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| /bsp/efm32/EFM32GG_DK3750/ |
| A D | trace.c | 120 ITM->LAR = 0xC5ACCE55; in TRACE_SWOSetup()
121 ITM->TCR = 0x10009; in TRACE_SWOSetup()
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| /bsp/fujitsu/mb9x/mb9bf568r/CMSIS/Include/ |
| A D | core_cm3.h | 855 #define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct… macro
1180 (ITM->TCR & ITM_TCR_ITMENA_Msk) && /* ITM enabled */ in ITM_SendChar()
1181 (ITM->TER & (1UL << 0) ) ) /* ITM Port #0 enabled */ in ITM_SendChar()
1183 while (ITM->PORT[0].u32 == 0); in ITM_SendChar()
1184 ITM->PORT[0].u8 = (uint8_t) ch; in ITM_SendChar()
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| A D | core_cm4.h | 991 #define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct… macro
1322 (ITM->TCR & ITM_TCR_ITMENA_Msk) && /* ITM enabled */ in ITM_SendChar()
1323 (ITM->TER & (1UL << 0) ) ) /* ITM Port #0 enabled */ in ITM_SendChar()
1325 while (ITM->PORT[0].u32 == 0); in ITM_SendChar()
1326 ITM->PORT[0].u8 = (uint8_t) ch; in ITM_SendChar()
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| /bsp/efm32/ |
| A D | board.c | 239 ITM->LAR = 0xC5ACCE55; in Swo_Configuration()
240 ITM->TCR = 0x10009; in Swo_Configuration()
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| /bsp/fujitsu/mb9x/mb9bf500r/CMSIS/ |
| A D | core_cm3.h | 753 #define ITM ((ITM_Type *) ITM_BASE) /*!< ITM configuration struct… macro
1107 (ITM->TCR & ITM_TCR_ITMENA_Msk) && /* ITM enabled */ in ITM_SendChar()
1108 (ITM->TER & (1ul << 0) ) ) /* ITM Port #0 enabled */ in ITM_SendChar()
1110 while (ITM->PORT[0].u32 == 0); in ITM_SendChar()
1111 ITM->PORT[0].u8 = (uint8_t) ch; in ITM_SendChar()
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| /bsp/smartfusion2/CMSIS/ |
| A D | core_cm3.h | 732 #define ITM ((ITM_Type *) ITM_BASE) /*!< ITM configuration struct… macro
1785 (ITM->TCR & ITM_TCR_ITMENA_Msk) && /* ITM enabled */ in ITM_SendChar()
1786 (ITM->TER & (1ul << 0) ) ) /* ITM Port #0 enabled */ in ITM_SendChar()
1788 while (ITM->PORT[0].u32 == 0); in ITM_SendChar()
1789 ITM->PORT[0].u8 = (uint8_t) ch; in ITM_SendChar()
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| /bsp/wch/arm/Libraries/CH32F10x_StdPeriph_Driver/CMSIS/ |
| A D | core_cm3.h | 726 #define ITM ((ITM_Type *) ITM_BASE) /*!< ITM configuration struct… macro
1759 (ITM->TCR & ITM_TCR_ITMENA_Msk) && /* ITM enabled */ in ITM_SendChar()
1760 (ITM->TER & (1ul << 0) ) ) /* ITM Port #0 enabled */ in ITM_SendChar()
1762 while (ITM->PORT[0].u32 == 0); in ITM_SendChar()
1763 ITM->PORT[0].u8 = (uint8_t) ch; in ITM_SendChar()
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| /bsp/wch/arm/Libraries/CH32F20x_StdPeriph_Driver/CMSIS/ |
| A D | core_cm3.h | 726 #define ITM ((ITM_Type *) ITM_BASE) /*!< ITM configuration struct… macro
1759 (ITM->TCR & ITM_TCR_ITMENA_Msk) && /* ITM enabled */ in ITM_SendChar()
1760 (ITM->TER & (1ul << 0) ) ) /* ITM Port #0 enabled */ in ITM_SendChar()
1762 while (ITM->PORT[0].u32 == 0); in ITM_SendChar()
1763 ITM->PORT[0].u8 = (uint8_t) ch; in ITM_SendChar()
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| /bsp/efm32/Libraries/CMSIS/Include/ |
| A D | core_cm3.h | 1232 #define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct… macro
1559 if ((ITM->TCR & ITM_TCR_ITMENA_Msk) && /* ITM enabled */ in ITM_SendChar()
1560 (ITM->TER & (1UL << 0) ) ) /* ITM Port #0 enabled */ in ITM_SendChar()
1562 while (ITM->PORT[0].u32 == 0); in ITM_SendChar()
1563 ITM->PORT[0].u8 = (uint8_t) ch; in ITM_SendChar()
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| /bsp/fujitsu/mb9x/mb9bf506r/libraries/CMSIS/Include/ |
| A D | core_cm3.h | 1232 #define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct… macro
1559 if ((ITM->TCR & ITM_TCR_ITMENA_Msk) && /* ITM enabled */ in ITM_SendChar()
1560 (ITM->TER & (1UL << 0) ) ) /* ITM Port #0 enabled */ in ITM_SendChar()
1562 while (ITM->PORT[0].u32 == 0); in ITM_SendChar()
1563 ITM->PORT[0].u8 = (uint8_t) ch; in ITM_SendChar()
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| /bsp/fujitsu/mb9x/mb9bf618s/CMSIS/Include/ |
| A D | core_cm3.h | 1247 #define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct… macro
1574 if ((ITM->TCR & ITM_TCR_ITMENA_Msk) && /* ITM enabled */ in ITM_SendChar()
1575 (ITM->TER & (1UL << 0) ) ) /* ITM Port #0 enabled */ in ITM_SendChar()
1577 while (ITM->PORT[0].u32 == 0); in ITM_SendChar()
1578 ITM->PORT[0].u8 = (uint8_t) ch; in ITM_SendChar()
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| A D | core_sc300.h | 1218 #define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct… macro
1545 if ((ITM->TCR & ITM_TCR_ITMENA_Msk) && /* ITM enabled */ in ITM_SendChar()
1546 (ITM->TER & (1UL << 0) ) ) /* ITM Port #0 enabled */ in ITM_SendChar()
1548 while (ITM->PORT[0].u32 == 0); in ITM_SendChar()
1549 ITM->PORT[0].u8 = (uint8_t) ch; in ITM_SendChar()
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| /bsp/CME_M7/CMSIS/CMSIS/Include/ |
| A D | core_sc300.h | 1218 #define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct… macro
1545 if ((ITM->TCR & ITM_TCR_ITMENA_Msk) && /* ITM enabled */ in ITM_SendChar()
1546 (ITM->TER & (1UL << 0) ) ) /* ITM Port #0 enabled */ in ITM_SendChar()
1548 while (ITM->PORT[0].u32 == 0); in ITM_SendChar()
1549 ITM->PORT[0].u8 = (uint8_t) ch; in ITM_SendChar()
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| A D | core_cm3.h | 1247 #define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct… macro
1574 if ((ITM->TCR & ITM_TCR_ITMENA_Msk) && /* ITM enabled */ in ITM_SendChar()
1575 (ITM->TER & (1UL << 0) ) ) /* ITM Port #0 enabled */ in ITM_SendChar()
1577 while (ITM->PORT[0].u32 == 0); in ITM_SendChar()
1578 ITM->PORT[0].u8 = (uint8_t) ch; in ITM_SendChar()
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| /bsp/samd21/sam_d2x_asflib/CMSIS/Include/ |
| A D | core_cm3.h | 1267 #define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct… macro
1594 if ((ITM->TCR & ITM_TCR_ITMENA_Msk) && /* ITM enabled */ in ITM_SendChar()
1595 (ITM->TER & (1UL << 0) ) ) /* ITM Port #0 enabled */ in ITM_SendChar()
1597 while (ITM->PORT[0].u32 == 0); in ITM_SendChar()
1598 ITM->PORT[0].u8 = (uint8_t) ch; in ITM_SendChar()
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| A D | core_sc300.h | 1247 #define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct… macro
1574 if ((ITM->TCR & ITM_TCR_ITMENA_Msk) && /* ITM enabled */ in ITM_SendChar()
1575 (ITM->TER & (1UL << 0) ) ) /* ITM Port #0 enabled */ in ITM_SendChar()
1577 while (ITM->PORT[0].u32 == 0); in ITM_SendChar()
1578 ITM->PORT[0].u8 = (uint8_t) ch; in ITM_SendChar()
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| /bsp/maxim/libraries/MAX32660PeriphDriver/CMSIS/Core/Include/ |
| A D | core_cm3.h | 1247 #define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct… macro
1574 if ((ITM->TCR & ITM_TCR_ITMENA_Msk) && /* ITM enabled */ in ITM_SendChar()
1575 (ITM->TER & (1UL << 0) ) ) /* ITM Port #0 enabled */ in ITM_SendChar()
1577 while (ITM->PORT[0].u32 == 0); in ITM_SendChar()
1578 ITM->PORT[0].u8 = (uint8_t) ch; in ITM_SendChar()
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| /bsp/mm32l07x/Libraries/CMSIS/CORE/ |
| A D | core_cm3.h | 1247 #define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct… macro
1574 if ((ITM->TCR & ITM_TCR_ITMENA_Msk) && /* ITM enabled */ in ITM_SendChar()
1575 (ITM->TER & (1UL << 0) ) ) /* ITM Port #0 enabled */ in ITM_SendChar()
1577 while (ITM->PORT[0].u32 == 0); in ITM_SendChar()
1578 ITM->PORT[0].u8 = (uint8_t) ch; in ITM_SendChar()
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| A D | core_sc300.h | 1218 #define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct… macro
1545 if ((ITM->TCR & ITM_TCR_ITMENA_Msk) && /* ITM enabled */ in ITM_SendChar()
1546 (ITM->TER & (1UL << 0) ) ) /* ITM Port #0 enabled */ in ITM_SendChar()
1548 while (ITM->PORT[0].u32 == 0); in ITM_SendChar()
1549 ITM->PORT[0].u8 = (uint8_t) ch; in ITM_SendChar()
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| /bsp/synwit/libraries/SWM320_CSL/CMSIS/CoreSupport/ |
| A D | core_cm3.h | 1267 #define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct… macro
1594 if ((ITM->TCR & ITM_TCR_ITMENA_Msk) && /* ITM enabled */ in ITM_SendChar()
1595 (ITM->TER & (1UL << 0) ) ) /* ITM Port #0 enabled */ in ITM_SendChar()
1597 while (ITM->PORT[0].u32 == 0); in ITM_SendChar()
1598 ITM->PORT[0].u8 = (uint8_t) ch; in ITM_SendChar()
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| /bsp/mm32l07x/Libraries/CMSIS/IAR_CORE/ |
| A D | core_cm3.h | 1267 #define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct… macro
1594 if ((ITM->TCR & ITM_TCR_ITMENA_Msk) && /* ITM enabled */ in ITM_SendChar()
1595 (ITM->TER & (1UL << 0) ) ) /* ITM Port #0 enabled */ in ITM_SendChar()
1597 while (ITM->PORT[0].u32 == 0); in ITM_SendChar()
1598 ITM->PORT[0].u8 = (uint8_t) ch; in ITM_SendChar()
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| A D | core_sc300.h | 1247 #define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct… macro
1574 if ((ITM->TCR & ITM_TCR_ITMENA_Msk) && /* ITM enabled */ in ITM_SendChar()
1575 (ITM->TER & (1UL << 0) ) ) /* ITM Port #0 enabled */ in ITM_SendChar()
1577 while (ITM->PORT[0].u32 == 0); in ITM_SendChar()
1578 ITM->PORT[0].u8 = (uint8_t) ch; in ITM_SendChar()
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| /bsp/mm32l3xx/Libraries/CMSIS/IAR_CORE/ |
| A D | core_cm3.h | 1267 #define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct… macro
1594 if ((ITM->TCR & ITM_TCR_ITMENA_Msk) && /* ITM enabled */ in ITM_SendChar()
1595 (ITM->TER & (1UL << 0) ) ) /* ITM Port #0 enabled */ in ITM_SendChar()
1597 while (ITM->PORT[0].u32 == 0); in ITM_SendChar()
1598 ITM->PORT[0].u8 = (uint8_t) ch; in ITM_SendChar()
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