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Searched refs:LCR (Results 1 – 25 of 47) sorted by relevance

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/bsp/tae32f5300/Libraries/TAE32F53xx_StdPeriph_Driver/inc/
A Dtae32f53xx_ll_lvdctrl.h241 #define __LL_LVDCTRL_VDD_OverCurBrk_En(__LVD__) SET_BIT((__LVD__)->LCR, LVDCTRL_VDDOC_B…
255 #define __LL_LVDCTRL_VDD_LowVolBrk_En(__LVD__) SET_BIT((__LVD__)->LCR, LVDCTRL_VDDLV_B…
269 #define __LL_LVDCTRL_VCC_LowVolBrk_En(__LVD__) SET_BIT((__LVD__)->LCR, LVDCTRL_VCCLV_B…
283 #define __LL_LVDCTRL_AVCC_LowVolBrk_En(__LVD__) SET_BIT((__LVD__)->LCR, LVDCTRL_AVCCLV_…
297 #define __LL_LVDCTRL_VDD_OverCurInt_En(__LVD__) SET_BIT((__LVD__)->LCR, LVDCTRL_VDDOC_I…
311 #define __LL_LVDCTRL_VDD_LowVolInt_En(__LVD__) SET_BIT((__LVD__)->LCR, LVDCTRL_VDDLV_I…
325 #define __LL_LVDCTRL_VCC_LowVolInt_En(__LVD__) SET_BIT((__LVD__)->LCR, LVDCTRL_VCCLV_I…
339 #define __LL_LVDCTRL_AVCC_LowVolInt_En(__LVD__) SET_BIT((__LVD__)->LCR, LVDCTRL_AVCCLV_…
353 #define __LL_LVDCTRL_VDD_OverCurRst_En(__LVD__) SET_BIT((__LVD__)->LCR, LVDCTRL_VDDOC_R…
367 #define __LL_LVDCTRL_VDD_LowVolRst_En(__LVD__) SET_BIT((__LVD__)->LCR, LVDCTRL_VDDLV_R…
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A Dtae32f53xx_ll_uart.h330 #define __LL_UART_DivLatchAccess_Set(__UART__) SET_BIT((__UART__)->LCR, UART_LCR_DLAB_Msk)
337 #define __LL_UART_DivLatchAccess_Clr(__UART__) CLEAR_BIT((__UART__)->LCR, UART_LCR_DLAB_Msk)
344 #define __LL_UART_BreakCtrl_Set(__UART__) SET_BIT((__UART__)->LCR, UART_LCR_BC_Msk)
351 #define __LL_UART_BreakCtrl_Clr(__UART__) CLEAR_BIT((__UART__)->LCR, UART_LCR_BC_Msk)
358 #define __LL_UART_StickParity_Set(__UART__) SET_BIT((__UART__)->LCR, UART_LCR_Stick_Parity_…
372 #define __LL_UART_EvenParity_Set(__UART__) SET_BIT((__UART__)->LCR, UART_LCR_EPS_Msk)
379 #define __LL_UART_EvenParity_Clr(__UART__) CLEAR_BIT((__UART__)->LCR, UART_LCR_EPS_Msk)
386 #define __LL_UART_Parity_En(__UART__) SET_BIT((__UART__)->LCR, UART_LCR_PEN_Msk)
393 #define __LL_UART_Parity_Dis(__UART__) CLEAR_BIT((__UART__)->LCR, UART_LCR_PEN_Msk)
408 #define __LL_UART_Stop1Bit_Set(__UART__) CLEAR_BIT((__UART__)->LCR, UART_LCR_STOP_Msk)
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/bsp/xuantie/libraries/xuantie_libraries/chip_riscv_dummy/src/drivers/
A Ddw_uart_ll.c78 uart_base->LCR |= DW_UART_LCR_DLAB_EN; in dw_uart_config_baudrate()
87 uart_base->LCR &= (~DW_UART_LCR_DLAB_EN); in dw_uart_config_baudrate()
120 uart_base->LCR &= (~DW_UART_LCR_PEN_EN); in dw_uart_config_parity_none()
133 uart_base->LCR |= DW_UART_LCR_PEN_EN; in dw_uart_config_parity_odd()
134 uart_base->LCR &= ~(DW_UART_LCR_EPS_EN); in dw_uart_config_parity_odd()
147 uart_base->LCR |= DW_UART_LCR_PEN_EN; in dw_uart_config_parity_even()
148 uart_base->LCR |= DW_UART_LCR_EPS_EN; in dw_uart_config_parity_even()
160 uart_base->LCR &= 0xFCU; in dw_uart_config_data_bits()
161 uart_base->LCR |= (data_bits - 5U); in dw_uart_config_data_bits()
/bsp/essemi/es32f0654/libraries/ES32F065x_ALD_StdPeriph_Driver/Include/
A Dald_uart.h54 #define UART_RX_ENABLE(hperh) (SET_BIT((hperh)->perh->LCR, UART_LCR_RXEN_MSK))
55 #define UART_RX_DISABLE(hperh) (CLEAR_BIT((hperh)->perh->LCR, UART_LCR_RXEN_MSK))
56 #define UART_BRR_WRITE_ENABLE(hperh) (SET_BIT((hperh)->perh->LCR, UART_LCR_BRWEN_MSK))
57 #define UART_BRR_WRITE_DISABLE(hperh) (CLEAR_BIT((hperh)->perh->LCR, UART_LCR_BRWEN_MSK))
58 #define UART_RX_TIMEOUT_ENABLE(hperh) (SET_BIT((hperh)->perh->LCR, UART_LCR_RTOEN_MSK))
62 #define UART_DATA_INV_ENABLE(hperh) (SET_BIT((hperh)->perh->LCR, UART_LCR_DATAINV_MSK))
64 #define UART_RX_INV_ENABLE(hperh) (SET_BIT((hperh)->perh->LCR, UART_LCR_RXINV_MSK))
65 #define UART_RX_INV_DISABLE(hperh) (CLEAR_BIT((hperh)->perh->LCR, UART_LCR_RXINV_MSK))
66 #define UART_TX_INV_ENABLE(hperh) (SET_BIT((hperh)->perh->LCR, UART_LCR_TXINV_MSK))
67 #define UART_TX_INV_DISABLE(hperh) (CLEAR_BIT((hperh)->perh->LCR, UART_LCR_TXINV_MSK))
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/bsp/rockchip/common/rk_hal/lib/hal/src/
A Dhal_uart.c35 pReg->LCR |= UART_LCR_DLAB; in UART_EnableDLAB()
40 pReg->LCR &= ~(UART_LCR_DLAB); in UART_DisableDLAB()
104 pReg->LCR = lcr; in UART_SetLcrReg()
131 pUartSave->LCR = pReg->LCR; in HAL_UART_Suspend()
140 pReg->LCR = UART_LCR_DLAB; in HAL_UART_Suspend()
145 pReg->LCR = pUartSave->LCR; in HAL_UART_Suspend()
163 pReg->LCR = UART_LCR_DLAB; in HAL_UART_Resume()
166 pReg->LCR = pUartSave->LCR; in HAL_UART_Resume()
/bsp/nxp/lpc/lpc178x/drivers/
A Dlpc177x_8x_uart.c147 UARTx->LCR |= UART_LCR_DLAB_EN; in uart_set_divisors()
154 UARTx->LCR &= (~UART_LCR_DLAB_EN) & UART_LCR_BITMASK; in uart_set_divisors()
236 UARTx->LCR = 0; in UART_Init()
353 UARTx->LCR = (uint8_t)(tmp & UART_LCR_BITMASK); in UART_Init()
649 UARTx->LCR |= UART_LCR_BREAK_EN; in UART_ForceBreak()
952 UARTx->LCR |= UART_LCR_DLAB_EN; in UART_ABCmd()
958 UARTx->LCR &= ~UART_LCR_DLAB_EN; in UART_ABCmd()
1278 UARTx->LCR |= (UART_LCR_PARITY_F_0 | UART_LCR_PARITY_EN); in UART_RS485Config()
1317 save = tmp = UARTx->LCR & UART_LCR_BITMASK; in UART_RS485Send()
1321 UARTx->LCR = tmp; in UART_RS485Send()
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/bsp/ck802/libraries/common/usart/
A Ddw_usart.c101 addr->LCR |= LCR_SET_DLAB; in dw_usart_set_baudrate()
109 addr->LCR &= (~LCR_SET_DLAB); in dw_usart_set_baudrate()
134 addr->LCR &= LCR_PARITY_ODD; in dw_usart_set_parity()
140 addr->LCR |= LCR_PARITY_EVEN; in dw_usart_set_parity()
163 addr->LCR &= LCR_STOP_BIT1; in dw_usart_set_stopbit()
171 addr->LCR |= LCR_STOP_BIT2; in dw_usart_set_stopbit()
201 addr->LCR &= LCR_WORD_SIZE_5; in dw_usart_set_databit()
205 addr->LCR &= 0xfd; in dw_usart_set_databit()
206 addr->LCR |= LCR_WORD_SIZE_6; in dw_usart_set_databit()
210 addr->LCR &= 0xfe; in dw_usart_set_databit()
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A Ddw_usart.h95 __IOM uint32_t LCR; /* Offset: 0x00C (R/W) Transmission control register */ member
/bsp/airm2m/air105/libraries/HAL_Driver/Src/
A Dcore_uart.c134 uint32_t tmpBaudRateDiv, LCR; in Uart_BaseInit() local
160 Uart->LCR |= UART_LCR_DLAB; in Uart_BaseInit()
168 Uart->LCR &= ~UART_LCR_DLAB; in Uart_BaseInit()
173 LCR |= UART_StopBits_1; in Uart_BaseInit()
179 LCR |= UART_StopBits_2; in Uart_BaseInit()
185 LCR |= UART_Parity_No; in Uart_BaseInit()
188 LCR |= UART_Parity_Odd; in Uart_BaseInit()
191 LCR |= UART_Parity_Even; in Uart_BaseInit()
194 Uart->LCR = LCR; in Uart_BaseInit()
223 Uart->LCR |= UART_LCR_DLAB; in Uart_DeInit()
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/bsp/thead-smart/drivers/
A Dck_usart.c97 addr->LCR |= LCR_SET_DLAB; in csi_usart_config_baudrate()
105 addr->LCR &= (~LCR_SET_DLAB); in csi_usart_config_baudrate()
152 addr->LCR &= LCR_PARITY_ODD; in csi_usart_config_parity()
158 addr->LCR |= LCR_PARITY_EVEN; in csi_usart_config_parity()
186 addr->LCR &= LCR_STOP_BIT1; in csi_usart_config_stopbits()
194 addr->LCR |= LCR_STOP_BIT2; in csi_usart_config_stopbits()
229 addr->LCR &= LCR_WORD_SIZE_5; in csi_usart_config_databits()
233 addr->LCR &= 0xfd; in csi_usart_config_databits()
234 addr->LCR |= LCR_WORD_SIZE_6; in csi_usart_config_databits()
238 addr->LCR &= 0xfe; in csi_usart_config_databits()
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A Dck_usart.h79 __IOM uint32_t LCR; /* Offset: 0x00C (R/W) Transmission control register */ member
/bsp/nxp/lpc/lpc43xx/drivers/
A Ddrv_uart.c209 uart->USART->LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */ in rt_hw_uart_init()
213 uart->USART->LCR = 0x03; /* DLAB = 0 */ in rt_hw_uart_init()
260 uart->USART->LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */ in rt_hw_uart_init()
264 uart->USART->LCR = 0x03; /* DLAB = 0 */ in rt_hw_uart_init()
312 uart->USART->LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */ in rt_hw_uart_init()
316 uart->USART->LCR = 0x03; /* DLAB = 0 */ in rt_hw_uart_init()
/bsp/xplorer4330/drivers/
A Ddrv_uart.c238 LPC_USART0->LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */ in rt_hw_uart_init()
242 LPC_USART0->LCR = 0x03; /* DLAB = 0 */ in rt_hw_uart_init()
290 LPC_USART2->LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */ in rt_hw_uart_init()
294 LPC_USART2->LCR = 0x03; /* DLAB = 0 */ in rt_hw_uart_init()
/bsp/rockchip/common/rk_hal/lib/hal/src/pm/
A Dhal_pm_rk2108.c64 uint32_t LCR; member
590 pUartSave->LCR = pUart->LCR; in SOC_UartSave()
599 pUart->LCR = UART_LCR_DLAB; in SOC_UartSave()
602 pUart->LCR = pUartSave->LCR; in SOC_UartSave()
611 pUart->LCR = UART_LCR_DLAB; in SOC_UartRestore()
614 pUart->LCR = pUartSave->LCR; in SOC_UartRestore()
/bsp/nxp/lpc/lpc176x/drivers/
A Duart.c130 LPC_UART0->LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */ in rt_uart_init()
134 LPC_UART0->LCR = 0x03; /* DLAB = 0 */ in rt_uart_init()
163 LPC_UART1->LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */ in rt_uart_init()
167 LPC_UART1->LCR = 0x03; /* DLAB = 0 */ in rt_uart_init()
/bsp/ht32/libraries/HT32_STD_1xxxx_FWLib/library/HT32F1xxxx_Driver/src/
A Dht32f1xxxx_usart.c168 USARTx->LCR = (USARTx->LCR & LCR_CLEAR_Mask) | USART_InitStruct->USART_StopBits | in USART_Init()
517 USARTx->LCR |= USART_BREAK_ON; in USART_ForceBreakCmd()
521 USARTx->LCR &= USART_BREAK_OFF; in USART_ForceBreakCmd()
550 USARTx->LCR |= USART_SPE_ON; in USART_StickParityCmd()
554 USARTx->LCR &= USART_SPE_OFF; in USART_StickParityCmd()
586 USARTx->LCR |= USART_STICK_LOW; in USART_StickParityConfig()
590 USARTx->LCR &= USART_STICK_HIGH; in USART_StickParityConfig()
/bsp/nxp/lpc/lpc408x/drivers/
A Ddrv_uart.c38 uart->UART->LCR |= 0x80; in lpc_configure()
44 uart->UART->LCR &= ~0x80; in lpc_configure()
46 uart->UART->LCR |= 0x03; in lpc_configure()
/bsp/hpmicro/libraries/hpm_sdk/drivers/src/
A Dhpm_uart_drv.c105 ptr->LCR |= UART_LCR_DLAB_MASK; in uart_init()
117 tmp = ptr->LCR & (~UART_LCR_DLAB_MASK); in uart_init()
160 ptr->LCR = tmp | UART_LCR_WLS_SET(config->word_length); in uart_init()
204 ptr->LCR |= UART_LCR_DLAB_MASK; in uart_set_baudrate()
215 ptr->LCR &= ~UART_LCR_DLAB_MASK; in uart_set_baudrate()
/bsp/synwit/libraries/SWM341_CSL/SWM341_StdPeriph_Driver/
A DSWM341_lcd.c65 LCDx->L[0].LCR = (1 << LCD_LCR_EN_Pos) | in LCD_Init()
101 LCDx->L[layerx].LCR = (1 << LCD_LCR_EN_Pos) | in LCD_LayerInit()
232 LCDx->L[0].LCR |= (1 << LCD_LCR_EN_Pos); //MPU模式下需要使能Layer1 in MPULCD_Init()
/bsp/k210/drivers/
A Ddrv_uart.c359 _uart[channel]->LCR |= 1u << 7; in rt_uart_configure()
363 _uart[channel]->LCR = 0; in rt_uart_configure()
364 _uart[channel]->LCR = (data_width - 5) | in rt_uart_configure()
367 _uart[channel]->LCR &= ~(1u << 7); in rt_uart_configure()
/bsp/xuantie/libraries/xuantie_libraries/chip_riscv_dummy/include/
A Ddw_uart_ll.h286 __IOM uint32_t LCR; /* Offset: 0x00C (R/W) Line control register */ member
363 uart_base->LCR &= ~(DW_UART_LCR_STOP_Msk); in dw_uart_config_stop_bits_1()
368 uart_base->LCR |= DW_UART_LCR_STOP_2_BIT; in dw_uart_config_stop_bits_2()
/bsp/essemi/es32f0654/libraries/ES32F065x_ALD_StdPeriph_Driver/Source/
A Dald_uart.c320 WRITE_REG(hperh->perh->LCR, 0x0); in ald_uart_reset()
355 tmp = READ_REG(hperh->perh->LCR); in ald_uart_init()
360 WRITE_REG(hperh->perh->LCR, tmp); in ald_uart_init()
362 SET_BIT(hperh->perh->LCR, UART_LCR_BRWEN_MSK); in ald_uart_init()
364 CLEAR_BIT(hperh->perh->LCR, UART_LCR_BRWEN_MSK); in ald_uart_init()
370 SET_BIT(hperh->perh->LCR, UART_LCR_RXEN_MSK); in ald_uart_init()
386 SET_BIT(hperh->perh->LCR, UART_LCR_RXINV_MSK); in ald_uart_init()
/bsp/smartfusion2/libraries/mss_uart/
A Dmss_uart.c879 set_bit_reg8(&this_uart->hw_reg->LCR,SB); in MSS_UART_set_break()
896 clear_bit_reg8(&this_uart->hw_reg->LCR,SB); in MSS_UART_clear_break()
1393 set_bit_reg8(&this_uart->hw_reg->LCR,DLAB); in config_baud_divisors()
1401 clear_bit_reg8(&this_uart->hw_reg->LCR,DLAB); in config_baud_divisors()
1416 set_bit_reg8(&this_uart->hw_reg->LCR,DLAB); in config_baud_divisors()
1424 clear_bit_reg8(&this_uart->hw_reg->LCR,DLAB); in config_baud_divisors()
1549 this_uart->hw_reg->LCR = line_config; in global_init()
/bsp/acm32/acm32f0x0-nucleo/libraries/HAL_Driver/Src/
A DHAL_LPUART.c203 hlpuart->Instance->LCR = temp_reg; in HAL_LPUART_Config()
276 …hlpuart->Instance->LCR=((hlpuart->StopWakeup.Wakeup_Source<<5)|(hlpuart->StopWakeup.Wakeup_Check<<… in HAL_LPUART_Init()
/bsp/acm32/acm32f4xx-nucleo/libraries/HAL_Driver/Src/
A DHAL_LPUART.c218 hlpuart->Instance->LCR = temp_reg; in HAL_LPUART_Config()
291 …hlpuart->Instance->LCR=((hlpuart->StopWakeup.Wakeup_Source<<5)|(hlpuart->StopWakeup.Wakeup_Check<<… in HAL_LPUART_Init()

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