Home
last modified time | relevance | path

Searched refs:LVL (Results 1 – 9 of 9) sorted by relevance

/bsp/rm48x50/HALCoGen/include/
A Dreg_spi.h43 uint32 LVL; /**< 0x000C: Interrupt Level */ member
A Dreg_mibspi.h43 uint32 LVL; /**< 0x000C: Interrupt Level */ member
/bsp/samd21/sam_d2x_asflib/sam0/utils/cmsis/samd21/include/component/
A Ddmac.h714 uint32_t LVL:2; /*!< bit: 5.. 6 Channel Arbitration Level */ member
/bsp/microchip/samc21/bsp/samc21/include/component/
A Ddmac.h704 uint32_t LVL:2; /*!< bit: 5.. 6 Channel Arbitration Level */ member
/bsp/microchip/saml10/bsp/include/component/
A Ddmac.h920 … uint32_t LVL:2; /**< bit: 5..6 Channel Arbitration Level */ member
/bsp/renesas/rzt2m_rsk/rzt/fsp/src/bsp/cmsis/Device/RENESAS/Include/
A DR9A07G074.h898 …__IOM uint32_t LVL : 1; /*!< [6..6] Level Detection Enable … member
1599 … __IOM uint32_t LVL : 1; /*!< [6..6] Sets the transfer request signal between the USB control member
A DR9A07G075.h898 …__IOM uint32_t LVL : 1; /*!< [6..6] Level Detection Enable … member
1617 … __IOM uint32_t LVL : 1; /*!< [6..6] Sets the transfer request signal between the USB control member
/bsp/renesas/rzn2l_rsk/rzn/fsp/src/bsp/cmsis/Device/RENESAS/Include/
A DR9A07G084.h900 …__IOM uint32_t LVL : 1; /*!< [6..6] Level Detection Enable … member
1618 … __IOM uint32_t LVL : 1; /*!< [6..6] Sets the transfer request signal between the USB control member
/bsp/renesas/rzn2l_etherkit/rzn/fsp/src/bsp/cmsis/Device/RENESAS/Include/
A DR9A07G084.h900 …__IOM uint32_t LVL : 1; /*!< [6..6] Level Detection Enable … member
1618 … __IOM uint32_t LVL : 1; /*!< [6..6] Sets the transfer request signal between the USB control member

Completed in 1668 milliseconds