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Searched refs:MCLK_APBCMASK_CCL (Results 1 – 11 of 11) sorted by relevance

/bsp/samd21/sam_d2x_asflib/sam0/drivers/ccl/
A Dccl.c53 system_apb_clock_set_mask(SYSTEM_CLOCK_APB_APBC, MCLK_APBCMASK_CCL); in ccl_init()
/bsp/microchip/saml10/bsp/hri/
A Dhri_mclk_l10.h1889 ((Mclk *)hw)->APBCMASK.reg |= MCLK_APBCMASK_CCL; in hri_mclk_set_APBCMASK_CCL_bit()
1897 tmp = (tmp & MCLK_APBCMASK_CCL) >> MCLK_APBCMASK_CCL_Pos; in hri_mclk_get_APBCMASK_CCL_bit()
1906 tmp &= ~MCLK_APBCMASK_CCL; in hri_mclk_write_APBCMASK_CCL_bit()
1915 ((Mclk *)hw)->APBCMASK.reg &= ~MCLK_APBCMASK_CCL; in hri_mclk_clear_APBCMASK_CCL_bit()
1922 ((Mclk *)hw)->APBCMASK.reg ^= MCLK_APBCMASK_CCL; in hri_mclk_toggle_APBCMASK_CCL_bit()
/bsp/microchip/samc21/bsp/samc21/include/component/
A Dmclk.h345 #define MCLK_APBCMASK_CCL (_U_(0x1) << MCLK_APBCMASK_CCL_Pos) macro
/bsp/microchip/saml10/bsp/include/component/
A Dmclk.h383 #define MCLK_APBCMASK_CCL MCLK_APBCMASK_CCL_Msk /**< \de… macro
/bsp/microchip/samc21/bsp/hri/
A Dhri_mclk_c21.h2407 ((Mclk *)hw)->APBCMASK.reg |= MCLK_APBCMASK_CCL; in hri_mclk_set_APBCMASK_CCL_bit()
2415 tmp = (tmp & MCLK_APBCMASK_CCL) >> MCLK_APBCMASK_CCL_Pos; in hri_mclk_get_APBCMASK_CCL_bit()
2424 tmp &= ~MCLK_APBCMASK_CCL; in hri_mclk_write_APBCMASK_CCL_bit()
2433 ((Mclk *)hw)->APBCMASK.reg &= ~MCLK_APBCMASK_CCL; in hri_mclk_clear_APBCMASK_CCL_bit()
2440 ((Mclk *)hw)->APBCMASK.reg ^= MCLK_APBCMASK_CCL; in hri_mclk_toggle_APBCMASK_CCL_bit()
/bsp/microchip/same54/bsp/include/component/
A Dmclk.h408 #define MCLK_APBCMASK_CCL (_U_(0x1) << MCLK_APBCMASK_CCL_Pos) macro
/bsp/microchip/samd51-seeed-wio-terminal/bsp/samd51a/include/component/
A Dmclk.h398 #define MCLK_APBCMASK_CCL (_U_(0x1) << MCLK_APBCMASK_CCL_Pos) macro
/bsp/microchip/samd51-adafruit-metro-m4/bsp/samd51a/include/component/
A Dmclk.h398 #define MCLK_APBCMASK_CCL (_U_(0x1) << MCLK_APBCMASK_CCL_Pos) macro
/bsp/microchip/samd51-seeed-wio-terminal/bsp/hri/
A Dhri_mclk_d51.h2792 ((Mclk *)hw)->APBCMASK.reg |= MCLK_APBCMASK_CCL; in hri_mclk_set_APBCMASK_CCL_bit()
2800 tmp = (tmp & MCLK_APBCMASK_CCL) >> MCLK_APBCMASK_CCL_Pos; in hri_mclk_get_APBCMASK_CCL_bit()
2809 tmp &= ~MCLK_APBCMASK_CCL; in hri_mclk_write_APBCMASK_CCL_bit()
2818 ((Mclk *)hw)->APBCMASK.reg &= ~MCLK_APBCMASK_CCL; in hri_mclk_clear_APBCMASK_CCL_bit()
2825 ((Mclk *)hw)->APBCMASK.reg ^= MCLK_APBCMASK_CCL; in hri_mclk_toggle_APBCMASK_CCL_bit()
/bsp/microchip/same54/bsp/hri/
A Dhri_mclk_e54.h2952 ((Mclk *)hw)->APBCMASK.reg |= MCLK_APBCMASK_CCL; in hri_mclk_set_APBCMASK_CCL_bit()
2960 tmp = (tmp & MCLK_APBCMASK_CCL) >> MCLK_APBCMASK_CCL_Pos; in hri_mclk_get_APBCMASK_CCL_bit()
2969 tmp &= ~MCLK_APBCMASK_CCL; in hri_mclk_write_APBCMASK_CCL_bit()
2978 ((Mclk *)hw)->APBCMASK.reg &= ~MCLK_APBCMASK_CCL; in hri_mclk_clear_APBCMASK_CCL_bit()
2985 ((Mclk *)hw)->APBCMASK.reg ^= MCLK_APBCMASK_CCL; in hri_mclk_toggle_APBCMASK_CCL_bit()
/bsp/microchip/samd51-adafruit-metro-m4/bsp/hri/
A Dhri_mclk_d51.h2792 ((Mclk *)hw)->APBCMASK.reg |= MCLK_APBCMASK_CCL; in hri_mclk_set_APBCMASK_CCL_bit()
2800 tmp = (tmp & MCLK_APBCMASK_CCL) >> MCLK_APBCMASK_CCL_Pos; in hri_mclk_get_APBCMASK_CCL_bit()
2809 tmp &= ~MCLK_APBCMASK_CCL; in hri_mclk_write_APBCMASK_CCL_bit()
2818 ((Mclk *)hw)->APBCMASK.reg &= ~MCLK_APBCMASK_CCL; in hri_mclk_clear_APBCMASK_CCL_bit()
2825 ((Mclk *)hw)->APBCMASK.reg ^= MCLK_APBCMASK_CCL; in hri_mclk_toggle_APBCMASK_CCL_bit()

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