Searched refs:MCLK_APBCMASK_EVSYS (Results 1 – 5 of 5) sorted by relevance
134 system_apb_clock_set_mask(SYSTEM_CLOCK_APB_APBC, MCLK_APBCMASK_EVSYS); in _system_events_init()
1449 ((Mclk *)hw)->APBCMASK.reg |= MCLK_APBCMASK_EVSYS; in hri_mclk_set_APBCMASK_EVSYS_bit()1457 tmp = (tmp & MCLK_APBCMASK_EVSYS) >> MCLK_APBCMASK_EVSYS_Pos; in hri_mclk_get_APBCMASK_EVSYS_bit()1466 tmp &= ~MCLK_APBCMASK_EVSYS; in hri_mclk_write_APBCMASK_EVSYS_bit()1475 ((Mclk *)hw)->APBCMASK.reg &= ~MCLK_APBCMASK_EVSYS; in hri_mclk_clear_APBCMASK_EVSYS_bit()1482 ((Mclk *)hw)->APBCMASK.reg ^= MCLK_APBCMASK_EVSYS; in hri_mclk_toggle_APBCMASK_EVSYS_bit()
303 #define MCLK_APBCMASK_EVSYS (_U_(0x1) << MCLK_APBCMASK_EVSYS_Pos) macro
350 #define MCLK_APBCMASK_EVSYS MCLK_APBCMASK_EVSYS_Msk /**< \de… macro
1567 ((Mclk *)hw)->APBCMASK.reg |= MCLK_APBCMASK_EVSYS; in hri_mclk_set_APBCMASK_EVSYS_bit()1575 tmp = (tmp & MCLK_APBCMASK_EVSYS) >> MCLK_APBCMASK_EVSYS_Pos; in hri_mclk_get_APBCMASK_EVSYS_bit()1584 tmp &= ~MCLK_APBCMASK_EVSYS; in hri_mclk_write_APBCMASK_EVSYS_bit()1593 ((Mclk *)hw)->APBCMASK.reg &= ~MCLK_APBCMASK_EVSYS; in hri_mclk_clear_APBCMASK_EVSYS_bit()1600 ((Mclk *)hw)->APBCMASK.reg ^= MCLK_APBCMASK_EVSYS; in hri_mclk_toggle_APBCMASK_EVSYS_bit()
Completed in 29 milliseconds